From patchwork Sun May 25 01:08:48 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Edgar E. Iglesias" X-Patchwork-Id: 352209 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 7B91C140083 for ; Sun, 25 May 2014 11:23:10 +1000 (EST) Received: from localhost ([::1]:49949 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WoN9Y-0005kF-Cw for incoming@patchwork.ozlabs.org; Sat, 24 May 2014 21:23:08 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:58401) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WoN90-0004lH-2T for qemu-devel@nongnu.org; Sat, 24 May 2014 21:22:40 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1WoN8t-0007gg-RN for qemu-devel@nongnu.org; Sat, 24 May 2014 21:22:33 -0400 Received: from mail-pb0-x236.google.com ([2607:f8b0:400e:c01::236]:61859) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WoN8t-0007gb-Jz for qemu-devel@nongnu.org; Sat, 24 May 2014 21:22:27 -0400 Received: by mail-pb0-f54.google.com with SMTP id jt11so5883867pbb.41 for ; Sat, 24 May 2014 18:22:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=ZCZMDWpHw78bK3Gc65K7EJKPFEJ37X3bRGrEF2fGWtw=; b=PrRechhPKGT1TOfZDnpGR77YeGR/ZPIsVsqcY+fmlPG7pzIhS1D9X59UEEIsZ4hkDJ jLPzcnrjikiMCXx+oysgnEveZL7Jqp4eSKMARQFx8kNDMlyIRuC3NmbBq6MLyzOzyHyL WkwY8PexrfRYG/2hTsA2+amacASWdKVHOEpq5qp1wRkN1pl+aYYLOVLndEzj80e4mr1G 94zldlAPHLqZUm4+WCe1Uw9KPfA9/KJIUzy8lUEZaQ+1LEEoZ2zM+PT9cgro6Ad1c9nv jLbpSqBuh2LlNI92tzhiZQi8JwuDlPFI5NzIqB5I3IaIS1xj2fJgV1VXa/mIPJmS6yes FS8A== X-Received: by 10.66.146.105 with SMTP id tb9mr45576pab.157.1400980946471; Sat, 24 May 2014 18:22:26 -0700 (PDT) Received: from localhost ([203.126.243.116]) by mx.google.com with ESMTPSA id xy2sm13757998pab.16.2014.05.24.18.22.19 for (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Sat, 24 May 2014 18:22:25 -0700 (PDT) From: "Edgar E. Iglesias" To: qemu-devel@nongnu.org, peter.maydell@linaro.org Date: Sun, 25 May 2014 11:08:48 +1000 Message-Id: <1400980132-25949-20-git-send-email-edgar.iglesias@gmail.com> X-Mailer: git-send-email 1.8.3.2 In-Reply-To: <1400980132-25949-1-git-send-email-edgar.iglesias@gmail.com> References: <1400980132-25949-1-git-send-email-edgar.iglesias@gmail.com> X-detected-operating-system: by eggs.gnu.org: Error: Malformed IPv6 address (bad octet value). X-Received-From: 2607:f8b0:400e:c01::236 Cc: rob.herring@linaro.org, peter.crosthwaite@xilinx.com, aggelerf@ethz.ch, agraf@suse.de, john.williams@xilinx.com, greg.bellows@linaro.org, alex.bennee@linaro.org, christoffer.dall@linaro.org, rth@twiddle.net Subject: [Qemu-devel] [PATCH v5 19/23] target-arm: A64: Generalize ERET to various ELs X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: "Edgar E. Iglesias" Adds support for ERET to and from AArch64 EL2 and 3. Signed-off-by: Edgar E. Iglesias --- target-arm/op_helper.c | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/target-arm/op_helper.c b/target-arm/op_helper.c index e95a7f4..50a4157 100644 --- a/target-arm/op_helper.c +++ b/target-arm/op_helper.c @@ -386,13 +386,13 @@ void HELPER(msr_i_pstate)(CPUARMState *env, uint32_t op, uint32_t imm) void HELPER(exception_return)(CPUARMState *env) { - unsigned int spsr_idx = aarch64_banked_spsr_index(1); + int cur_el = arm_current_pl(env); + unsigned int spsr_idx = aarch64_banked_spsr_index(cur_el); uint32_t spsr = env->banked_spsr[spsr_idx]; int new_el, i; - int cur_el = arm_current_pl(env); if (env->pstate & PSTATE_SP) { - env->sp_el[1] = env->xregs[31]; + env->sp_el[cur_el] = env->xregs[31]; } else { env->sp_el[0] = env->xregs[31]; } @@ -400,6 +400,7 @@ void HELPER(exception_return)(CPUARMState *env) env->exclusive_addr = -1; if (spsr & PSTATE_nRW) { + /* TODO: We currently assume EL1/2/3 are running in AArch64. */ env->aarch64 = 0; new_el = 0; env->uncached_cpsr = 0x10; @@ -429,7 +430,7 @@ void HELPER(exception_return)(CPUARMState *env) env->aarch64 = 1; pstate_write(env, spsr); env->xregs[31] = env->sp_el[new_el]; - env->pc = env->elr_el[1]; + env->pc = env->elr_el[cur_el]; } return; @@ -443,7 +444,7 @@ illegal_return: * no change to exception level, execution state or stack pointer */ env->pstate |= PSTATE_IL; - env->pc = env->elr_el[1]; + env->pc = env->elr_el[cur_el]; spsr &= PSTATE_NZCV | PSTATE_DAIF; spsr |= pstate_read(env) & ~(PSTATE_NZCV | PSTATE_DAIF); pstate_write(env, spsr);