From patchwork Sun May 25 01:08:41 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Edgar E. Iglesias" X-Patchwork-Id: 352202 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 20ED3140085 for ; Sun, 25 May 2014 11:18:21 +1000 (EST) Received: from localhost ([::1]:49905 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WoN4t-0006op-0V for incoming@patchwork.ozlabs.org; Sat, 24 May 2014 21:18:19 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:57753) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WoN4R-0006AF-On for qemu-devel@nongnu.org; Sat, 24 May 2014 21:17:57 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1WoN4L-00069f-QS for qemu-devel@nongnu.org; Sat, 24 May 2014 21:17:51 -0400 Received: from mail-wi0-x22b.google.com ([2a00:1450:400c:c05::22b]:35213) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WoN4L-00069a-KD for qemu-devel@nongnu.org; Sat, 24 May 2014 21:17:45 -0400 Received: by mail-wi0-f171.google.com with SMTP id cc10so2552727wib.10 for ; Sat, 24 May 2014 18:17:44 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=prNUay5tJGYlE4zHp+sxr3XwSxzG3oy/yRfeYZ1FGIM=; b=F5v+fNyBZLrMd4/ipFwzET6yPfSUKt91gk1X38tSjY/TfO6pezs+kfWLx8zoYT/Xjk X5swczsDTGcKM0CirP3nEQB0SZcxi6+gKm+e+++mpMdfh5W2QFpUo6MrtW8hGavkorId muHg+BKWRBLGlakx9X7u41qs/WjRt28y3PAKetN5JG0jx0Rvr8uA+7ifV8AN/ggd+YCx OUhnf5OkaU0LCkUyjCNpcjwOC/aTxPmVTzj/bTCX0V5IjqGHfA7NIl9+Z3W2Hx59akGM ynWTBGTpgXQsMCYrj7+FvRXPncWijn3wf63ofMD27QRuZKWtqUWcmQUxLblWzOCSIUPG sf6w== X-Received: by 10.181.11.193 with SMTP id ek1mr10136635wid.15.1400980664868; Sat, 24 May 2014 18:17:44 -0700 (PDT) Received: from localhost ([203.126.243.116]) by mx.google.com with ESMTPSA id 18sm14498355wju.15.2014.05.24.18.17.39 for (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Sat, 24 May 2014 18:17:44 -0700 (PDT) From: "Edgar E. Iglesias" To: qemu-devel@nongnu.org, peter.maydell@linaro.org Date: Sun, 25 May 2014 11:08:41 +1000 Message-Id: <1400980132-25949-13-git-send-email-edgar.iglesias@gmail.com> X-Mailer: git-send-email 1.8.3.2 In-Reply-To: <1400980132-25949-1-git-send-email-edgar.iglesias@gmail.com> References: <1400980132-25949-1-git-send-email-edgar.iglesias@gmail.com> X-detected-operating-system: by eggs.gnu.org: Error: Malformed IPv6 address (bad octet value). X-Received-From: 2a00:1450:400c:c05::22b Cc: rob.herring@linaro.org, peter.crosthwaite@xilinx.com, aggelerf@ethz.ch, agraf@suse.de, john.williams@xilinx.com, greg.bellows@linaro.org, alex.bennee@linaro.org, christoffer.dall@linaro.org, rth@twiddle.net Subject: [Qemu-devel] [PATCH v5 12/23] target-arm: A64: Introduce aarch64_banked_spsr_index() X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: "Edgar E. Iglesias" Add aarch64_banked_spsr_index(), used to map an Exception Level to an index in the banked_spsr array. Reviewed-by: Peter Crosthwaite Signed-off-by: Edgar E. Iglesias --- target-arm/helper-a64.c | 2 +- target-arm/internals.h | 14 ++++++++++++++ target-arm/op_helper.c | 3 ++- 3 files changed, 17 insertions(+), 2 deletions(-) diff --git a/target-arm/helper-a64.c b/target-arm/helper-a64.c index b8e6d56..b970fd1 100644 --- a/target-arm/helper-a64.c +++ b/target-arm/helper-a64.c @@ -488,7 +488,7 @@ void aarch64_cpu_do_interrupt(CPUState *cs) } if (is_a64(env)) { - env->banked_spsr[0] = pstate_read(env); + env->banked_spsr[aarch64_banked_spsr_index(1)] = pstate_read(env); env->sp_el[arm_current_pl(env)] = env->xregs[31]; env->xregs[31] = env->sp_el[1]; env->elr_el[1] = env->pc; diff --git a/target-arm/internals.h b/target-arm/internals.h index d63a975..c9897c2 100644 --- a/target-arm/internals.h +++ b/target-arm/internals.h @@ -75,6 +75,20 @@ static inline void arm_log_exception(int idx) */ #define GTIMER_SCALE 16 +/* + * For AArch64, map a given EL to an index in the banked_spsr array. + */ +static inline unsigned int aarch64_banked_spsr_index(unsigned int el) +{ + static const unsigned int map[4] = { + [1] = 0, /* EL1. */ + [2] = 6, /* EL2. */ + [3] = 7, /* EL3. */ + }; + assert(el >= 1 && el <= 3); + return map[el]; +} + int bank_number(int mode); void switch_mode(CPUARMState *, int); void arm_cpu_register_gdb_regs_for_features(ARMCPU *cpu); diff --git a/target-arm/op_helper.c b/target-arm/op_helper.c index f120b02..c2b4bf0 100644 --- a/target-arm/op_helper.c +++ b/target-arm/op_helper.c @@ -386,7 +386,8 @@ void HELPER(msr_i_pstate)(CPUARMState *env, uint32_t op, uint32_t imm) void HELPER(exception_return)(CPUARMState *env) { - uint32_t spsr = env->banked_spsr[0]; + unsigned int spsr_idx = aarch64_banked_spsr_index(1); + uint32_t spsr = env->banked_spsr[spsr_idx]; int new_el, i; if (env->pstate & PSTATE_SP) {