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[v1,20/22] target-arm: Make vbar_write writeback to any CPREG

Message ID 1399356506-5609-21-git-send-email-edgar.iglesias@gmail.com
State New
Headers show

Commit Message

Edgar E. Iglesias May 6, 2014, 6:08 a.m. UTC
From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com>

Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
---
 target-arm/helper.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Peter Crosthwaite May 7, 2014, 6:19 a.m. UTC | #1
On Tue, May 6, 2014 at 4:08 PM, Edgar E. Iglesias
<edgar.iglesias@gmail.com> wrote:
> From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com>
>
> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
> ---
>  target-arm/helper.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/target-arm/helper.c b/target-arm/helper.c
> index 65daeaf..2406058 100644
> --- a/target-arm/helper.c
> +++ b/target-arm/helper.c
> @@ -657,7 +657,7 @@ static void vbar_write(CPUARMState *env, const ARMCPRegInfo *ri,
>       * contexts. (ARMv8 would permit us to do no masking at all, but ARMv7
>       * requires the bottom five bits to be RAZ/WI because they're UNK/SBZP.)
>       */
> -    env->cp15.vbar_el[VBAR_EL_IDX(1)] = value & ~0x1FULL;
> +    CPREG_FIELD64(env, ri) = value & ~0x1FULL;

Use raw_write() to implement CP register writing (check
vmsa_ttbr_write for example).

Regards,
Peter

>  }
>
>  static uint64_t ccsidr_read(CPUARMState *env, const ARMCPRegInfo *ri)
> --
> 1.8.3.2
>
>
diff mbox

Patch

diff --git a/target-arm/helper.c b/target-arm/helper.c
index 65daeaf..2406058 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -657,7 +657,7 @@  static void vbar_write(CPUARMState *env, const ARMCPRegInfo *ri,
      * contexts. (ARMv8 would permit us to do no masking at all, but ARMv7
      * requires the bottom five bits to be RAZ/WI because they're UNK/SBZP.)
      */
-    env->cp15.vbar_el[VBAR_EL_IDX(1)] = value & ~0x1FULL;
+    CPREG_FIELD64(env, ri) = value & ~0x1FULL;
 }
 
 static uint64_t ccsidr_read(CPUARMState *env, const ARMCPRegInfo *ri)