From patchwork Tue May 6 06:08:13 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Edgar E. Iglesias" X-Patchwork-Id: 346028 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id D4F4B1412F2 for ; Tue, 6 May 2014 16:15:37 +1000 (EST) Received: from localhost ([::1]:33101 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WhYf9-0001Y1-GD for incoming@patchwork.ozlabs.org; Tue, 06 May 2014 02:15:35 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:54233) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WhYeh-0000g4-3C for qemu-devel@nongnu.org; Tue, 06 May 2014 02:15:13 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1WhYea-0001dR-KF for qemu-devel@nongnu.org; Tue, 06 May 2014 02:15:07 -0400 Received: from mail-qa0-x232.google.com ([2607:f8b0:400d:c00::232]:44470) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WhYea-0001dE-BZ for qemu-devel@nongnu.org; Tue, 06 May 2014 02:15:00 -0400 Received: by mail-qa0-f50.google.com with SMTP id j15so2877078qaq.23 for ; Mon, 05 May 2014 23:15:00 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=agw4KeRYu3eVREEgWQEcU7ImxC4Q2G5raFcyuShI51s=; b=OvqaNo2fqEuEQmThFkNBCAg3jXFBKp7aOUp8AkCm4FNqh7YxDJXJGA4sTh0F8rkn0A c4H7VqNTFnEaz6/tXEUvC37zODjJdzk4EdP6lD9YKP3LCgq0FtoNea0inVvMx6p4aLoJ ouxf1VW8wVkZS3x18rbkVEY/BqRLsOiwFXb2JzTaHKukk7qVzS1LAOp72Q2HtdOlsXhO MZGKlaqSYT2E6AKHa8DL74j4AlGaYFnUHIAVEhXmJ74amwlbO8X/Tnb/U/k8NzuQBXct obSXD7lWs55Ino5xMPa3R+45HJ4ptUAq0zzKeZPLqbeHdxHHIoj11YBT6MerCMrjQug7 BZbw== X-Received: by 10.224.66.133 with SMTP id n5mr52328959qai.11.1399356900015; Mon, 05 May 2014 23:15:00 -0700 (PDT) Received: from localhost ([203.126.243.116]) by mx.google.com with ESMTPSA id l46sm1547101qga.21.2014.05.05.23.14.54 for (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Mon, 05 May 2014 23:14:58 -0700 (PDT) From: "Edgar E. Iglesias" To: qemu-devel@nongnu.org, peter.maydell@linaro.org Date: Tue, 6 May 2014 16:08:13 +1000 Message-Id: <1399356506-5609-10-git-send-email-edgar.iglesias@gmail.com> X-Mailer: git-send-email 1.8.3.2 In-Reply-To: <1399356506-5609-1-git-send-email-edgar.iglesias@gmail.com> References: <1399356506-5609-1-git-send-email-edgar.iglesias@gmail.com> X-detected-operating-system: by eggs.gnu.org: Error: Malformed IPv6 address (bad octet value). X-Received-From: 2607:f8b0:400d:c00::232 Cc: rob.herring@linaro.org, peter.crosthwaite@xilinx.com, john.williams@xilinx.com, alex.bennee@linaro.org, agraf@suse.de Subject: [Qemu-devel] [PATCH v1 09/22] target-arm: Add SPSR entries for EL2/HYP and EL3/MON X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: "Edgar E. Iglesias" Signed-off-by: Edgar E. Iglesias --- target-arm/cpu.h | 4 +++- target-arm/helper.c | 4 ++++ target-arm/machine.c | 8 ++++---- 3 files changed, 11 insertions(+), 5 deletions(-) diff --git a/target-arm/cpu.h b/target-arm/cpu.h index fd8ce70..6e6625b 100644 --- a/target-arm/cpu.h +++ b/target-arm/cpu.h @@ -143,7 +143,7 @@ typedef struct CPUARMState { uint32_t spsr; /* Banked registers. */ - uint64_t banked_spsr[6]; + uint64_t banked_spsr[8]; uint32_t banked_r13[6]; uint32_t banked_r14[6]; @@ -566,7 +566,9 @@ enum arm_cpu_mode { ARM_CPU_MODE_FIQ = 0x11, ARM_CPU_MODE_IRQ = 0x12, ARM_CPU_MODE_SVC = 0x13, + ARM_CPU_MODE_MON = 0x16, ARM_CPU_MODE_ABT = 0x17, + ARM_CPU_MODE_HYP = 0x1a, ARM_CPU_MODE_UND = 0x1b, ARM_CPU_MODE_SYS = 0x1f }; diff --git a/target-arm/helper.c b/target-arm/helper.c index baeaa28..ba1830d 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -3078,6 +3078,10 @@ int bank_number(int mode) return 4; case ARM_CPU_MODE_FIQ: return 5; + case ARM_CPU_MODE_HYP: + return 6; + case ARM_CPU_MODE_MON: + return 7; } hw_error("bank number requested for bad CPSR mode value 0x%x\n", mode); } diff --git a/target-arm/machine.c b/target-arm/machine.c index 92ac621..e95be47 100644 --- a/target-arm/machine.c +++ b/target-arm/machine.c @@ -222,9 +222,9 @@ static int cpu_post_load(void *opaque, int version_id) const VMStateDescription vmstate_arm_cpu = { .name = "cpu", - .version_id = 19, - .minimum_version_id = 19, - .minimum_version_id_old = 19, + .version_id = 20, + .minimum_version_id = 20, + .minimum_version_id_old = 20, .pre_save = cpu_pre_save, .post_load = cpu_post_load, .fields = (VMStateField[]) { @@ -238,7 +238,7 @@ const VMStateDescription vmstate_arm_cpu = { .offset = 0, }, VMSTATE_UINT32(env.spsr, ARMCPU), - VMSTATE_UINT64_ARRAY(env.banked_spsr, ARMCPU, 6), + VMSTATE_UINT64_ARRAY(env.banked_spsr, ARMCPU, 8), VMSTATE_UINT32_ARRAY(env.banked_r13, ARMCPU, 6), VMSTATE_UINT32_ARRAY(env.banked_r14, ARMCPU, 6), VMSTATE_UINT32_ARRAY(env.usr_regs, ARMCPU, 5),