From patchwork Mon Jan 13 07:39:53 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Edgar E. Iglesias" X-Patchwork-Id: 309750 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id A33512C0092 for ; Mon, 13 Jan 2014 19:28:42 +1100 (EST) Received: from localhost ([::1]:41004 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1W2cIn-00017R-7B for incoming@patchwork.ozlabs.org; Mon, 13 Jan 2014 02:51:17 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:54515) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1W2cG3-0005v7-L4 for qemu-devel@nongnu.org; Mon, 13 Jan 2014 02:48:35 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1W2cFv-0006Yd-D5 for qemu-devel@nongnu.org; Mon, 13 Jan 2014 02:48:27 -0500 Received: from mail-qa0-x232.google.com ([2607:f8b0:400d:c00::232]:41514) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1W2cFv-0006YZ-8C for qemu-devel@nongnu.org; Mon, 13 Jan 2014 02:48:19 -0500 Received: by mail-qa0-f50.google.com with SMTP id cm18so4900242qab.9 for ; Sun, 12 Jan 2014 23:48:18 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=RLh9X34CUZItXMN1BpojdF6DPlVs7XlJjkan0u5C7rs=; b=K37WqhsS7tlTQ63K5i9NIAxV83FlomXeWeYMOCKoQEL0oqGSJC6iZFG5vHyROnHa4+ E3BuH5tgJItGcbORGTQRTHUlbkpJ6Wo2H8z4JOQnOFFICytbhmfdGSGBDaeK1HnQRGlf 4x/N74SOIU8mGMJFevhYVDZDEbS2VEtvMeii1+S3wHhuvGSpEsHB6Vw77mPnSxtRC3hD kwQtsF3D+ekqN3a7fMKPQ+aBUmMGDCHuNTM7qicUzVvWDlONIkWmHDBC1L14bix9gbAD Cr/H92tmnaFGesPLAF56vdlyTE3PYAM0RVkT/B3li3TUzyCc2WsUA4SPkar3wULhQ4Xj qI9A== X-Received: by 10.229.14.1 with SMTP id e1mr23942245qca.15.1389599298495; Sun, 12 Jan 2014 23:48:18 -0800 (PST) Received: from localhost ([149.199.62.254]) by mx.google.com with ESMTPSA id 11sm27145149qei.12.2014.01.12.23.48.16 for (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Sun, 12 Jan 2014 23:48:17 -0800 (PST) From: edgar.iglesias@gmail.com To: qemu-devel@nongnu.org Date: Mon, 13 Jan 2014 17:39:53 +1000 Message-Id: <1389598802-14977-14-git-send-email-edgar.iglesias@gmail.com> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1389598802-14977-1-git-send-email-edgar.iglesias@gmail.com> References: <1389598802-14977-1-git-send-email-edgar.iglesias@gmail.com> X-detected-operating-system: by eggs.gnu.org: Error: Malformed IPv6 address (bad octet value). X-Received-From: 2607:f8b0:400d:c00::232 Cc: peter.maydell@linaro.org, blauwirbel@gmail.com, aliguori@amazon.com, pcrost@xilinx.com, pbonzini@redhat.com, afaerber@suse.de, aurelien@aurel32.net, rth@twiddle.net Subject: [Qemu-devel] [PATCH v3 13/22] exec: Make stl_phys_notdirty input an AddressSpace X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: "Edgar E. Iglesias" Signed-off-by: Edgar E. Iglesias --- exec.c | 4 ++-- hw/arm/boot.c | 9 +++++---- hw/arm/highbank.c | 6 +++--- include/exec/cpu-common.h | 2 +- target-i386/helper.c | 16 ++++++++-------- target-sparc/mmu_helper.c | 2 +- 6 files changed, 20 insertions(+), 19 deletions(-) diff --git a/exec.c b/exec.c index cefd3be..a64577d 100644 --- a/exec.c +++ b/exec.c @@ -2526,14 +2526,14 @@ uint32_t lduw_be_phys(AddressSpace *as, hwaddr addr) /* warning: addr must be aligned. The ram page is not masked as dirty and the code inside is not invalidated. It is useful if the dirty bits are used to track modified PTEs */ -void stl_phys_notdirty(hwaddr addr, uint32_t val) +void stl_phys_notdirty(AddressSpace *as, hwaddr addr, uint32_t val) { uint8_t *ptr; MemoryRegion *mr; hwaddr l = 4; hwaddr addr1; - mr = address_space_translate(&address_space_memory, addr, &addr1, &l, + mr = address_space_translate(as, addr, &addr1, &l, true); if (l < 4 || !memory_access_is_direct(mr, true)) { io_mem_write(mr, addr1, val, 4); diff --git a/hw/arm/boot.c b/hw/arm/boot.c index 1c1b0e5..0e91a1a 100644 --- a/hw/arm/boot.c +++ b/hw/arm/boot.c @@ -16,6 +16,7 @@ #include "elf.h" #include "sysemu/device_tree.h" #include "qemu/config-file.h" +#include "exec/address-spaces.h" /* Kernel boot protocol is specified in the kernel docs * Documentation/arm/Booting and Documentation/arm64/booting.txt @@ -169,13 +170,13 @@ static void default_reset_secondary(ARMCPU *cpu, { CPUARMState *env = &cpu->env; - stl_phys_notdirty(info->smp_bootreg_addr, 0); + stl_phys_notdirty(&address_space_memory, info->smp_bootreg_addr, 0); env->regs[15] = info->smp_loader_start; } -#define WRITE_WORD(p, value) do { \ - stl_phys_notdirty(p, value); \ - p += 4; \ +#define WRITE_WORD(p, value) do { \ + stl_phys_notdirty(&address_space_memory, p, value); \ + p += 4; \ } while (0) static void set_kernel_args(const struct arm_boot_info *info) diff --git a/hw/arm/highbank.c b/hw/arm/highbank.c index d76a1d1..f66d57b 100644 --- a/hw/arm/highbank.c +++ b/hw/arm/highbank.c @@ -69,11 +69,11 @@ static void hb_reset_secondary(ARMCPU *cpu, const struct arm_boot_info *info) switch (info->nb_cpus) { case 4: - stl_phys_notdirty(SMP_BOOT_REG + 0x30, 0); + stl_phys_notdirty(&address_space_memory, SMP_BOOT_REG + 0x30, 0); case 3: - stl_phys_notdirty(SMP_BOOT_REG + 0x20, 0); + stl_phys_notdirty(&address_space_memory, SMP_BOOT_REG + 0x20, 0); case 2: - stl_phys_notdirty(SMP_BOOT_REG + 0x10, 0); + stl_phys_notdirty(&address_space_memory, SMP_BOOT_REG + 0x10, 0); env->regs[15] = SMP_BOOT_ADDR; break; default: diff --git a/include/exec/cpu-common.h b/include/exec/cpu-common.h index d005c98..525fb62 100644 --- a/include/exec/cpu-common.h +++ b/include/exec/cpu-common.h @@ -102,7 +102,7 @@ void stq_be_phys(AddressSpace *as, hwaddr addr, uint64_t val); uint32_t lduw_phys(AddressSpace *as, hwaddr addr); uint32_t ldl_phys(AddressSpace *as, hwaddr addr); uint64_t ldq_phys(AddressSpace *as, hwaddr addr); -void stl_phys_notdirty(hwaddr addr, uint32_t val); +void stl_phys_notdirty(AddressSpace *as, hwaddr addr, uint32_t val); void stw_phys(hwaddr addr, uint32_t val); void stl_phys(AddressSpace *as, hwaddr addr, uint32_t val); void stq_phys(AddressSpace *as, hwaddr addr, uint64_t val); diff --git a/target-i386/helper.c b/target-i386/helper.c index 0606908..55c0457 100644 --- a/target-i386/helper.c +++ b/target-i386/helper.c @@ -574,7 +574,7 @@ int cpu_x86_handle_mmu_fault(CPUX86State *env, target_ulong addr, } if (!(pml4e & PG_ACCESSED_MASK)) { pml4e |= PG_ACCESSED_MASK; - stl_phys_notdirty(pml4e_addr, pml4e); + stl_phys_notdirty(cs->as, pml4e_addr, pml4e); } ptep = pml4e ^ PG_NX_MASK; pdpe_addr = ((pml4e & PHYS_ADDR_MASK) + (((addr >> 30) & 0x1ff) << 3)) & @@ -591,7 +591,7 @@ int cpu_x86_handle_mmu_fault(CPUX86State *env, target_ulong addr, ptep &= pdpe ^ PG_NX_MASK; if (!(pdpe & PG_ACCESSED_MASK)) { pdpe |= PG_ACCESSED_MASK; - stl_phys_notdirty(pdpe_addr, pdpe); + stl_phys_notdirty(cs->as, pdpe_addr, pdpe); } } else #endif @@ -661,7 +661,7 @@ int cpu_x86_handle_mmu_fault(CPUX86State *env, target_ulong addr, pde |= PG_ACCESSED_MASK; if (is_dirty) pde |= PG_DIRTY_MASK; - stl_phys_notdirty(pde_addr, pde); + stl_phys_notdirty(cs->as, pde_addr, pde); } /* align to page_size */ pte = pde & ((PHYS_ADDR_MASK & ~(page_size - 1)) | 0xfff); @@ -670,7 +670,7 @@ int cpu_x86_handle_mmu_fault(CPUX86State *env, target_ulong addr, /* 4 KB page */ if (!(pde & PG_ACCESSED_MASK)) { pde |= PG_ACCESSED_MASK; - stl_phys_notdirty(pde_addr, pde); + stl_phys_notdirty(cs->as, pde_addr, pde); } pte_addr = ((pde & PHYS_ADDR_MASK) + (((addr >> 12) & 0x1ff) << 3)) & env->a20_mask; @@ -723,7 +723,7 @@ int cpu_x86_handle_mmu_fault(CPUX86State *env, target_ulong addr, pte |= PG_ACCESSED_MASK; if (is_dirty) pte |= PG_DIRTY_MASK; - stl_phys_notdirty(pte_addr, pte); + stl_phys_notdirty(cs->as, pte_addr, pte); } page_size = 4096; virt_addr = addr & ~0xfff; @@ -778,7 +778,7 @@ int cpu_x86_handle_mmu_fault(CPUX86State *env, target_ulong addr, pde |= PG_ACCESSED_MASK; if (is_dirty) pde |= PG_DIRTY_MASK; - stl_phys_notdirty(pde_addr, pde); + stl_phys_notdirty(cs->as, pde_addr, pde); } pte = pde & ~( (page_size - 1) & ~0xfff); /* align to page_size */ @@ -787,7 +787,7 @@ int cpu_x86_handle_mmu_fault(CPUX86State *env, target_ulong addr, } else { if (!(pde & PG_ACCESSED_MASK)) { pde |= PG_ACCESSED_MASK; - stl_phys_notdirty(pde_addr, pde); + stl_phys_notdirty(cs->as, pde_addr, pde); } /* page directory entry */ @@ -835,7 +835,7 @@ int cpu_x86_handle_mmu_fault(CPUX86State *env, target_ulong addr, pte |= PG_ACCESSED_MASK; if (is_dirty) pte |= PG_DIRTY_MASK; - stl_phys_notdirty(pte_addr, pte); + stl_phys_notdirty(cs->as, pte_addr, pte); } page_size = 4096; virt_addr = addr & ~0xfff; diff --git a/target-sparc/mmu_helper.c b/target-sparc/mmu_helper.c index 46bb038..5fc2fd6 100644 --- a/target-sparc/mmu_helper.c +++ b/target-sparc/mmu_helper.c @@ -180,7 +180,7 @@ static int get_physical_address(CPUSPARCState *env, hwaddr *physical, if (is_dirty) { pde |= PG_MODIFIED_MASK; } - stl_phys_notdirty(pde_ptr, pde); + stl_phys_notdirty(cs->as, pde_ptr, pde); } /* the page can be put in the TLB */