From patchwork Wed Jul 13 03:30:48 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tsuneo Saito X-Patchwork-Id: 104473 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [140.186.70.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 5A6F21007D3 for ; Wed, 13 Jul 2011 13:43:57 +1000 (EST) Received: from localhost ([::1]:34927 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QgqMb-0003F6-NT for incoming@patchwork.ozlabs.org; Tue, 12 Jul 2011 23:43:54 -0400 Received: from eggs.gnu.org ([140.186.70.92]:38832) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QgqAl-00019z-Rx for qemu-devel@nongnu.org; Tue, 12 Jul 2011 23:31:41 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1QgqAk-0004Xk-4p for qemu-devel@nongnu.org; Tue, 12 Jul 2011 23:31:39 -0400 Received: from mail-iy0-f173.google.com ([209.85.210.173]:40085) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QgqAj-0004D1-NW for qemu-devel@nongnu.org; Tue, 12 Jul 2011 23:31:37 -0400 Received: by mail-iy0-f173.google.com with SMTP id 3so5910382iyb.4 for ; Tue, 12 Jul 2011 20:31:37 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; bh=OPsAPiBkTIVyWMqdRcnvl4oFcOxi+GSWnOtW+zgV4Yk=; b=iYcV/SDpqReCa4NsVMVwfjMfuyYOPvJRwmDYrK1bOEvFSF68LkMjI9POV+vzcaFfO7 kVDoyF7FupeOC/WiFXL+oAmahlzE3CF7t+TufJp++uNhRP+pV830doJHmfoUWnsr/g4z i3cztGDWYFfKQlVdpk3YJP9WpJpAyVPQT/U4c= Received: by 10.42.163.133 with SMTP id c5mr692514icy.178.1310527897537; Tue, 12 Jul 2011 20:31:37 -0700 (PDT) Received: from localhost.localdomain (tetkyo149119.tkyo.te.ftth2.ppp.infoweb.ne.jp [202.219.195.119]) by mx.google.com with ESMTPS id hp8sm15541550icc.11.2011.07.12.20.31.36 (version=TLSv1/SSLv3 cipher=OTHER); Tue, 12 Jul 2011 20:31:37 -0700 (PDT) From: Tsuneo Saito To: qemu-devel@nongnu.org Date: Wed, 13 Jul 2011 12:30:48 +0900 Message-Id: <1310527849-784-4-git-send-email-tsnsaito@gmail.com> X-Mailer: git-send-email 1.7.5.4 In-Reply-To: <1310527849-784-1-git-send-email-tsnsaito@gmail.com> References: <1310527849-784-1-git-send-email-tsnsaito@gmail.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6 (newer, 2) X-Received-From: 209.85.210.173 Cc: Tsuneo Saito Subject: [Qemu-devel] [PATCH 3/4] SPARC64: Implement stfa/stdfa/stqfa instrcutions properly X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org This patch implements sparcv9 stfa/stdfa/stqfa instructions with non block-store ASIs. Signed-off-by: Tsuneo Saito --- target-sparc/op_helper.c | 15 +++++++++++---- target-sparc/translate.c | 2 -- 2 files changed, 11 insertions(+), 6 deletions(-) diff --git a/target-sparc/op_helper.c b/target-sparc/op_helper.c index a75ac4f..fe71829 100644 --- a/target-sparc/op_helper.c +++ b/target-sparc/op_helper.c @@ -3396,6 +3396,7 @@ void helper_stf_asi(target_ulong addr, int asi, int size, int rd) { unsigned int i; target_ulong val = 0; + CPU_DoubleU u; helper_check_align(addr, 3); addr = asi_address_mask(env, asi, addr); @@ -3440,16 +3441,22 @@ void helper_stf_asi(target_ulong addr, int asi, int size, int rd) switch(size) { default: case 4: - val = *((uint32_t *)&env->fpr[rd]); + helper_st_asi(addr, *(uint32_t *)&env->fpr[rd], asi, size); break; case 8: - val = *((int64_t *)&DT0); + u.l.upper = *(uint32_t *)&env->fpr[rd++]; + u.l.lower = *(uint32_t *)&env->fpr[rd++]; + helper_st_asi(addr, u.ll, asi, size); break; case 16: - // XXX + u.l.upper = *(uint32_t *)&env->fpr[rd++]; + u.l.lower = *(uint32_t *)&env->fpr[rd++]; + helper_st_asi(addr, u.ll, asi, 8); + u.l.upper = *(uint32_t *)&env->fpr[rd++]; + u.l.lower = *(uint32_t *)&env->fpr[rd++]; + helper_st_asi(addr + 8, u.ll, asi, 8); break; } - helper_st_asi(addr, val, asi, size); } target_ulong helper_cas_asi(target_ulong addr, target_ulong val1, diff --git a/target-sparc/translate.c b/target-sparc/translate.c index d07eb25..95e78a3 100644 --- a/target-sparc/translate.c +++ b/target-sparc/translate.c @@ -4739,12 +4739,10 @@ static void disas_sparc_insn(DisasContext * dc) r_const = tcg_const_i32(7); gen_helper_check_align(cpu_addr, r_const); tcg_temp_free_i32(r_const); - gen_op_load_fpr_QT0(QFPREG(rd)); gen_stf_asi(cpu_addr, insn, 16, QFPREG(rd)); } break; case 0x37: /* V9 stdfa */ - gen_op_load_fpr_DT0(DFPREG(rd)); gen_stf_asi(cpu_addr, insn, 8, DFPREG(rd)); break; case 0x3c: /* V9 casa */