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[188.255.126.251]) by smtp.gmail.com with ESMTPSA id 38308e7fff4ca-2ff178ee325sm5159001fa.27.2024.11.07.22.01.18 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 07 Nov 2024 22:01:19 -0800 (PST) From: baturo.alexey@gmail.com To: Cc: baturo.alexey@gmail.com, richard.henderson@linaro.org, zhiwei_liu@linux.alibaba.com, dbarboza@ventanamicro.com, liwei1518@gmail.com, alistair23@gmail.com, frank.chang@sifive.com, palmer@dabbelt.com, Alistair.Francis@wdc.com, sagark@eecs.berkeley.edu, kbastian@mail.uni-paderborn.de, qemu-devel@nongnu.org, qemu-riscv@nongnu.org Subject: [PATCH 0/7] Pointer Masking update for Zjpm v1.0 Date: Fri, 8 Nov 2024 09:01:09 +0300 Message-Id: <20241108060116.37397-1-baturo.alexey@gmail.com> X-Mailer: git-send-email 2.39.5 (Apple Git-154) MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::136; envelope-from=baturo.alexey@gmail.com; helo=mail-lf1-x136.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Alexey Baturo Hi, As Pointer Masking is finally ratified, these patches intend to update the existing code to the final version. These patches have been submitted previously and I tried to address all the suggestions, but I'd suggest to review them from the clean slate and then finally push them to the repo. Thanks. Alexey Baturo (7): target/riscv: Remove obsolete pointer masking extension code. target/riscv: Add new CSR fields for S{sn,mn,m}pm extensions as part of Zjpm v1.0 target/riscv: Add helper functions to calculate current number of masked bits for pointer masking target/riscv: Add pointer masking tb flags target/riscv: Update address modify functions to take into account pointer masking target/riscv: Apply pointer masking for virtualized memory accesses target/riscv: Enable updates for pointer masking variables and thus enable pointer masking extension target/riscv/cpu.c | 19 +- target/riscv/cpu.h | 51 ++-- target/riscv/cpu_bits.h | 91 +----- target/riscv/cpu_cfg.h | 3 + target/riscv/cpu_helper.c | 124 ++++++--- target/riscv/csr.c | 356 ++---------------------- target/riscv/insn_trans/trans_rvh.c.inc | 11 + target/riscv/machine.c | 17 +- target/riscv/pmp.c | 14 +- target/riscv/pmp.h | 1 + target/riscv/tcg/tcg-cpu.c | 5 +- target/riscv/translate.c | 51 ++-- target/riscv/vector_helper.c | 18 +- 13 files changed, 224 insertions(+), 537 deletions(-)