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[83.50.185.174]) by smtp.gmail.com with ESMTPSA id w5sm282615wrr.45.2021.12.15.10.24.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 15 Dec 2021 10:24:29 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Subject: [RFC PATCH v3 0/3] physmem: Have flaview API check bus permission from MemTxAttrs argument Date: Wed, 15 Dec 2021 19:24:18 +0100 Message-Id: <20211215182421.418374-1-philmd@redhat.com> X-Mailer: git-send-email 2.33.1 MIME-Version: 1.0 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=philmd@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Received-SPF: pass client-ip=170.10.129.124; envelope-from=philmd@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -34 X-Spam_score: -3.5 X-Spam_bar: --- X-Spam_report: (-3.5 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.719, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , David Hildenbrand , Jason Wang , Li Qiang , Qiuhao Li , Peter Xu , Alexander Bulekov , qemu-arm@nongnu.org, Gerd Hoffmann , Stefan Hajnoczi , "Edgar E . Iglesias" , Paolo Bonzini , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" This series aim to kill a recent class of bug, the infamous "DMA reentrancy" issues found by Alexander while fuzzing. Introduce the 'memory' field in MemTxAttrs, allowing to restrict a controller to memories (and not devices). If a transaction permission is not allowed (for example access to device), we return the specific MEMTX_BUS_ERROR. Permissions are checked in after the flatview is resolved, and before the access is done, in a new function: flatview_access_allowed(). Since v2 [1]: - Addressed review comments: - reword arm_gicv3 description (pm215) - merged patches 3/4/5 (peterx & dhildenb) - simplify flatview_access_allowed() logic (stefanha) - drop MEMTXPERM enum and reword following AMBA terminology (edgar) Since v1 ("hw: Forbid DMA write accesses to MMIO regions") [2]: - rewrite based on Peter / Stefan feedbacks Based on "hw: Let the DMA API take a MemTxAttrs argument" [3]. Based-on: <20210702092439.989969-1-philmd@redhat.com> [1] https://www.mail-archive.com/qemu-devel@nongnu.org/msg831168.html [2] https://www.mail-archive.com/qemu-block@nongnu.org/msg72924.html [3] https://www.mail-archive.com/qemu-devel@nongnu.org/msg820359.html Philippe Mathieu-Daudé (3): hw/intc/arm_gicv3: Check for !MEMTX_OK instead of MEMTX_ERROR softmmu/physmem: Simplify flatview_write and address_space_access_valid softmmu/physmem: Introduce MemTxAttrs::memory field and MEMTX_BUS_ERROR include/exec/memattrs.h | 9 +++++++ hw/intc/arm_gicv3_redist.c | 4 +-- softmmu/physmem.c | 54 +++++++++++++++++++++++++++++++------- 3 files changed, 55 insertions(+), 12 deletions(-)