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[81.231.232.130]) by smtp.gmail.com with ESMTPSA id y25sm18219571lfy.59.2020.04.17.12.10.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 17 Apr 2020 12:10:23 -0700 (PDT) From: "Edgar E. Iglesias" To: qemu-devel@nongnu.org Subject: [PATCH v1 0/6] target-microblaze: Misc configurability #2 Date: Fri, 17 Apr 2020 21:10:16 +0200 Message-Id: <20200417191022.5247-1-edgar.iglesias@gmail.com> X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::141 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: figlesia@xilinx.com, peter.maydell@linaro.org, sstabellini@kernel.org, edgar.iglesias@xilinx.com, sai.pavan.boddu@xilinx.com, frasse.iglesias@gmail.com, alistair@alistair23.me, richard.henderson@linaro.org, frederic.konrad@adacore.com, philmd@redhat.com, luc.michel@greensocs.com Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" From: "Edgar E. Iglesias" This is another round of conversion from hardcoded regs to cpu properties. The property names are taken from the device-tree bindings. Cheers, Edgar Edgar E. Iglesias (6): target/microblaze: Add the opcode-0x0-illegal CPU property target/microblaze: Add the ill-opcode-exception property target/microblaze: Add the div-zero-exception property target/microblaze: Add the unaligned-exceptions property target/microblaze: Add the pvr-user1 property target/microblaze: Add the pvr-user2 property target/microblaze/cpu.c | 22 ++++++++++++++++++++-- target/microblaze/cpu.h | 6 ++++++ target/microblaze/op_helper.c | 5 +++-- target/microblaze/translate.c | 8 ++++---- 4 files changed, 33 insertions(+), 8 deletions(-)