Message ID | 20190729145654.14644-1-damien.hedde@greensocs.com |
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Headers | show
Return-Path: <qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org> X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=<UNKNOWN>) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=greensocs.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; secure) header.d=greensocs.com header.i=@greensocs.com header.b="uUnopwiS"; dkim-atps=neutral Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 45y2vc2G7Bz9sML for <incoming@patchwork.ozlabs.org>; Tue, 30 Jul 2019 01:01:32 +1000 (AEST) Received: from localhost ([::1]:52912 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from <qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>) id 1hs79W-00070h-Cn for incoming@patchwork.ozlabs.org; Mon, 29 Jul 2019 11:01:30 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:37809) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from <damien.hedde@greensocs.com>) id 1hs77D-00048F-IW for qemu-devel@nongnu.org; Mon, 29 Jul 2019 10:59:10 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from <damien.hedde@greensocs.com>) id 1hs779-0004WY-Jk for qemu-devel@nongnu.org; Mon, 29 Jul 2019 10:59:07 -0400 Received: from beetle.greensocs.com ([5.135.226.135]:47824) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from <damien.hedde@greensocs.com>) id 1hs76y-0004LL-Rb; Mon, 29 Jul 2019 10:58:53 -0400 Received: from kouign-amann.bar.greensocs.com (unknown [172.16.11.117]) by beetle.greensocs.com (Postfix) with ESMTPS id 57B8196F52; Mon, 29 Jul 2019 14:58:48 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=greensocs.com; s=mail; t=1564412329; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=bbKIOzndvJvjGPCRQi73dk81BuTtK2CbU1pDEiN/02Q=; b=uUnopwiS0kBeBxatAwXRWOlbLfXe41phQv8GehOTtDAtVXOMWb/c61JcEmPUlG0fvi3CtJ irPBJ5NzqHvK6aVpsucDvjZ33QN0MnzLXlHCnAWk3DCxDwGNvoXzTP6Q8y3QduD+2pmjyf PLY8WDBtb3mCPvggGFBMPulZ8hx0WIs= From: Damien Hedde <damien.hedde@greensocs.com> To: qemu-devel@nongnu.org Date: Mon, 29 Jul 2019 16:56:21 +0200 Message-Id: <20190729145654.14644-1-damien.hedde@greensocs.com> X-Mailer: git-send-email 2.22.0 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=greensocs.com; s=mail; t=1564412329; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=bbKIOzndvJvjGPCRQi73dk81BuTtK2CbU1pDEiN/02Q=; b=a2uN0GUyre3imf42Jx8WT4hfqjEN3vYnvHX5AOcZTlmlF3LLJokF3lJAqvF/DIg48RsVw4 HK9BOUSQlyBc4qo2bP3+SKjh68niL0bTgCbuta1yALXxPpyvkOQfFDUpSj5bjmojKQBSoS OMXeo8JV56lyVrdsmc+SdeDcCxcX31Y= ARC-Seal: i=1; s=mail; d=greensocs.com; t=1564412329; a=rsa-sha256; cv=none; b=3YNduc5NhAT7iL7mYlfJ04ojE9RDJ0v70q8M7ka50AJL4XAq9+TFiZs2he7zaE/4GaEWf+ bOLusSnXsALqd39pzMWKAIlvtfotfR24e4RoCwo9Fih+78reeVV6SDsPcunXzqnypp25GZ EHfgRJypzdjmjhpkl9yl1ruJe3y0cro= ARC-Authentication-Results: i=1; beetle.greensocs.com; none Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 5.135.226.135 Subject: [Qemu-devel] [PATCH v3 00/33] Multi-phase reset mechanism X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: <qemu-devel.nongnu.org> List-Unsubscribe: <https://lists.nongnu.org/mailman/options/qemu-devel>, <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe> List-Archive: <https://lists.nongnu.org/archive/html/qemu-devel> List-Post: <mailto:qemu-devel@nongnu.org> List-Help: <mailto:qemu-devel-request@nongnu.org?subject=help> List-Subscribe: <https://lists.nongnu.org/mailman/listinfo/qemu-devel>, <mailto:qemu-devel-request@nongnu.org?subject=subscribe> Cc: fam@euphon.net, peter.maydell@linaro.org, walling@linux.ibm.com, dmitry.fleytman@gmail.com, mst@redhat.com, mark.cave-ayland@ilande.co.uk, kraxel@redhat.com, edgar.iglesias@xilinx.com, hare@suse.com, qemu-block@nongnu.org, david@redhat.com, pasic@linux.ibm.com, borntraeger@de.ibm.com, marcandre.lureau@redhat.com, rth@twiddle.net, thuth@redhat.com, ehabkost@redhat.com, alistair@alistair23.me, qemu-s390x@nongnu.org, qemu-arm@nongnu.org, clg@kaod.org, jsnow@redhat.com, david@gibson.dropbear.id.au, Damien Hedde <damien.hedde@greensocs.com>, berrange@redhat.com, cohuck@redhat.com, mark.burton@greensocs.com, qemu-ppc@nongnu.org, pbonzini@redhat.com Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" <qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org> |
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Multi-phase reset mechanism
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On Mon, 29 Jul 2019 16:56:21 +0200 Damien Hedde <damien.hedde@greensocs.com> wrote: (...) > 2. old's device_reset > > There was a few call to this function, I renamed it *device_legacy_reset* to > handle the transition. This function allowed to reset only a given device > (and not its eventual qbus subtree). This behavior is not possible with > the Resettable interface. I changed existing calls. Most of the time there is > no change of behavior because devices have no sub-buses. > Here the summary after checking each one (I've reproduced the list made by > Peter with some additional commentary of myself): (...) > hw/s390x/s390-pci-inst.c > -- resets the S390PCIBusDevice Needs S390 expertise, but probably > either no child buses or failure to reset them is a bug. That's the 'zpci' device, which holds additional architecture information for each pci device. Looks fine to me, but additional confirmation from Collin would be good.