From patchwork Tue Nov 10 04:52:14 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amitay Isaacs X-Patchwork-Id: 1397293 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [203.11.71.2]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4CVb8X0Zkwz9sPB for ; Tue, 10 Nov 2020 15:53:00 +1100 (AEDT) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=ozlabs.org Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; secure) header.d=ozlabs.org header.i=@ozlabs.org header.a=rsa-sha256 header.s=201707 header.b=J54NGOaq; dkim-atps=neutral Received: from bilbo.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 4CVb8W5J6wzDqcy for ; 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Tue, 10 Nov 2020 15:52:28 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ozlabs.org; s=201707; t=1604983949; bh=+LK9/U7edkgyT5k/Nv4nFWWW8A/AwzwIDuYZnsHWV60=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=J54NGOaqmR2TRc6koI+aACmakqM4X+cyR7giOXqnmS/w0HS82UViffne/Swej2zaG BfPMJ5Up40hMfVNVTDIk0WNkSobJ774VArTXAh00CySM0HR28MniaxfEmHXtN5NtHG 6i5OAbmvVkQCJqWsNTpw51NvXhFZlqHVtli6xWavNwpYUrqC77vWVBckRQQU4oD9tU fbCVbtw4BpFvF3Q1f4g0XPcNaCLf0FPifWNsTUPAySPzRsIenyOrwkYwCt7X2xE22/ pkWPwwI4xc4zWBt/76oMpP4yzU6YG9ycSHnvA51ERCK1t8EAsEAoxAVye8n+264Pph 6EEnlwRIwE2ZQ== From: Amitay Isaacs To: pdbg@lists.ozlabs.org Date: Tue, 10 Nov 2020 15:52:14 +1100 Message-Id: <20201110045217.137133-2-amitay@ozlabs.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20201110045217.137133-1-amitay@ozlabs.org> References: <20201110045217.137133-1-amitay@ozlabs.org> MIME-Version: 1.0 Subject: [Pdbg] [PATCH 1/4] libpdbg: Separate p10 core driver X-BeenThere: pdbg@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: "mailing list for https://github.com/open-power/pdbg development" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Amitay Isaacs Errors-To: pdbg-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Pdbg" Signed-off-by: Amitay Isaacs --- Makefile.am | 1 + libpdbg/p10_fapi_targets.c | 38 -------------------- libpdbg/p10chip.c | 71 ++++++++++++++++++++++++++++++++++++++ 3 files changed, 72 insertions(+), 38 deletions(-) create mode 100644 libpdbg/p10chip.c diff --git a/Makefile.am b/Makefile.am index cf505fd..fc7e2f6 100644 --- a/Makefile.am +++ b/Makefile.am @@ -184,6 +184,7 @@ libpdbg_la_SOURCES = \ libpdbg/p9chip.c \ libpdbg/p9_fapi_targets.c \ libpdbg/p9_scom_addr.h \ + libpdbg/p10chip.c \ libpdbg/p10_fapi_targets.c \ libpdbg/p10_scom_addr.h \ libpdbg/sbefifo.c \ diff --git a/libpdbg/p10_fapi_targets.c b/libpdbg/p10_fapi_targets.c index 0779f50..6023389 100644 --- a/libpdbg/p10_fapi_targets.c +++ b/libpdbg/p10_fapi_targets.c @@ -43,43 +43,6 @@ static struct eq p10_eq = { }; DECLARE_HW_UNIT(p10_eq); -#define NUM_CORES_PER_EQ 4 -static uint64_t p10_core_translate(struct core *c, uint64_t addr) -{ - int region = 0; - int chip_unitnum = pdbg_target_index(t(c)); - - switch(chip_unitnum % NUM_CORES_PER_EQ) { - case 0: - region = 8; - break; - case 1: - region = 4; - break; - case 2: - region = 2; - break; - case 3: - region = 1; - break; - } - addr = set_chiplet_id(addr, EQ0_CHIPLET_ID + pdbg_target_index(t(c)) / 4); - addr &= 0xFFFFFFFFFFFF0FFFULL; - addr |= ((region & 0xF) << 12); - - return addr; -} - -static struct core p10_core = { - .target = { - .name = "POWER10 core", - .compatible = "ibm,power10-core", - .class = "core", - .translate = translate_cast(p10_core_translate), - }, -}; -DECLARE_HW_UNIT(p10_core); - static uint64_t p10_pec_translate(struct pec *pec, uint64_t addr) { int chip_unitnum = pdbg_target_index(t(pec)); @@ -564,7 +527,6 @@ __attribute__((constructor)) static void register_p10_fapi_targets(void) { pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &p10_eq_hw_unit); - pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &p10_core_hw_unit); pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &p10_pec_hw_unit); pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &p10_phb_hw_unit); pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &p10_nmmu_hw_unit); diff --git a/libpdbg/p10chip.c b/libpdbg/p10chip.c new file mode 100644 index 0000000..7a3976a --- /dev/null +++ b/libpdbg/p10chip.c @@ -0,0 +1,71 @@ +/* Copyright 2020 IBM Corp. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + * implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +#include +#include + +#include "hwunit.h" +#include "bitutils.h" +#include "operations.h" +#include "chip.h" +#include "debug.h" + +#define NUM_CORES_PER_EQ 4 +#define EQ0_CHIPLET_ID 0x20 + +static uint64_t p10_core_translate(struct core *c, uint64_t addr) +{ + int region = 0; + int chip_unitnum = pdbg_target_index(&c->target); + int chiplet_id = EQ0_CHIPLET_ID + chip_unitnum / NUM_CORES_PER_EQ; + + switch(chip_unitnum % NUM_CORES_PER_EQ) { + case 0: + region = 8; + break; + case 1: + region = 4; + break; + case 2: + region = 2; + break; + case 3: + region = 1; + break; + } + addr &= 0xFFFFFFFFC0FFFFFFULL; + addr |= ((chiplet_id & 0x3F) << 24); + + addr &= 0xFFFFFFFFFFFF0FFFULL; + addr |= ((region & 0xF) << 12); + + return addr; +} + +static struct core p10_core = { + .target = { + .name = "POWER10 Core", + .compatible = "ibm,power10-core", + .class = "core", + .translate = translate_cast(p10_core_translate), + }, +}; +DECLARE_HW_UNIT(p10_core); + +__attribute__((constructor)) +static void register_p10chip(void) +{ + pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &p10_core_hw_unit); +}