diff mbox series

[v4,12/19] libpdbg: Add thread driver using sbefifo

Message ID 20200421041655.82856-13-amitay@ozlabs.org
State Superseded
Headers show
Series Add sbefifo backend | expand

Checks

Context Check Description
snowpatch_ozlabs/apply_patch success Successfully applied on branch master (6ae2ba655ca5e24b403a33bf15dff7261d3e7052)
snowpatch_ozlabs/build-multiarch success Test build-multiarch on branch master

Commit Message

Amitay Isaacs April 21, 2020, 4:16 a.m. UTC
Signed-off-by: Amitay Isaacs <amitay@ozlabs.org>
---
 libpdbg/sbefifo.c | 77 +++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 77 insertions(+)

Comments

Alistair Popple April 30, 2020, 1:26 a.m. UTC | #1
Reviewed-by: Alistair Popple <alistair@popple.id.au>

On Tuesday, 21 April 2020 2:16:48 PM AEST Amitay Isaacs wrote:
> Signed-off-by: Amitay Isaacs <amitay@ozlabs.org>
> ---
>  libpdbg/sbefifo.c | 77 +++++++++++++++++++++++++++++++++++++++++++++++
>  1 file changed, 77 insertions(+)
> 
> diff --git a/libpdbg/sbefifo.c b/libpdbg/sbefifo.c
> index ca3a43d..eeb8d5c 100644
> --- a/libpdbg/sbefifo.c
> +++ b/libpdbg/sbefifo.c
> @@ -271,6 +271,67 @@ static int sbefifo_pib_write(struct pib *pib, uint64_t
> addr, uint64_t val) return sbefifo_scom_put(sctx, addr, val);
>  }
> 
> +static int sbefifo_thread_probe(struct pdbg_target *target)
> +{
> +	struct thread *thread = target_to_thread(target);
> +	uint32_t tid;
> +
> +	assert(!pdbg_target_u32_property(target, "tid", &tid));
> +	thread->id = tid;
> +
> +	return 0;
> +}
> +
> +static void sbefifo_thread_release(struct pdbg_target *target)
> +{
> +}
> +
> +static int sbefifo_thread_op(struct thread *thread, uint32_t oper)
> +{
> +	struct pdbg_target *chiplet =
> +		pdbg_target_require_parent("chiplet", &thread->target);
> +	struct pdbg_target *pib = pdbg_target_require_parent("pib", chiplet);
> +	struct sbefifo *sbefifo = pib_to_sbefifo(pib);
> +	struct sbefifo_context *sctx = sbefifo->get_sbefifo_context(sbefifo);
> +	uint8_t mode = 0;
> +
> +	/* Enforce special-wakeup for thread stop and sreset */
> +	if ((oper & 0xf) == SBEFIFO_INSN_OP_STOP ||
> +	    (oper & 0xf) == SBEFIFO_INSN_OP_SRESET)
> +		mode = 0x2;
> +
> +	/* This chip-op requires core-id as pervasive (chiplet) id */
> +	return sbefifo_control_insn(sctx,
> +				    pdbg_target_index(chiplet),
> +				    thread->id,
> +				    oper,
> +				    mode);
> +}
> +static int sbefifo_thread_start(struct thread *thread)
> +{
> +	return sbefifo_thread_op(thread, SBEFIFO_INSN_OP_START);
> +}
> +
> +static int sbefifo_thread_stop(struct thread *thread)
> +{
> +	return sbefifo_thread_op(thread, SBEFIFO_INSN_OP_STOP);
> +}
> +
> +static int sbefifo_thread_step(struct thread *thread, int count)
> +{
> +	int i, rc = 0;
> +
> +	for (i = 0; i < count; i++)
> +		rc |= sbefifo_thread_op(thread, SBEFIFO_INSN_OP_STEP);
> +
> +	return rc;
> +}
> +
> +static int sbefifo_thread_sreset(struct thread *thread)
> +{
> +	return sbefifo_thread_op(thread, SBEFIFO_INSN_OP_SRESET);
> +}
> +
>  static struct sbefifo_context *sbefifo_op_get_context(struct sbefifo
> *sbefifo) {
>  	return sbefifo->sf_ctx;
> @@ -352,6 +413,21 @@ static struct pib sbefifo_pib = {
>  };
>  DECLARE_HW_UNIT(sbefifo_pib);
> 
> +static struct thread sbefifo_thread = {
> +	.target = {
> +		.name = "SBE FFIO Chip-op based Thread",
> +		.compatible = "ibm,power-thread",
> +		.class = "thread",
> +		.probe = sbefifo_thread_probe,
> +		.release = sbefifo_thread_release,
> +	},
> +	.start = sbefifo_thread_start,
> +	.stop = sbefifo_thread_stop,
> +	.step = sbefifo_thread_step,
> +	.sreset = sbefifo_thread_sreset,
> +};
> +DECLARE_HW_UNIT(sbefifo_thread);
> +
>  static struct sbefifo kernel_sbefifo = {
>  	.target = {
>  		.name =	"Kernel based FSI SBE FIFO",
> @@ -370,6 +446,7 @@ static void register_sbefifo(void)
>  	pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &kernel_sbefifo_hw_unit);
>  	pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &sbefifo_chipop_hw_unit);
>  	pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &sbefifo_pib_hw_unit);
> +	pdbg_hwunit_register(PDBG_BACKEND_SBEFIFO, &sbefifo_thread_hw_unit);
>  	pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &sbefifo_mem_hw_unit);
>  	pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &sbefifo_pba_hw_unit);
>  }
diff mbox series

Patch

diff --git a/libpdbg/sbefifo.c b/libpdbg/sbefifo.c
index ca3a43d..eeb8d5c 100644
--- a/libpdbg/sbefifo.c
+++ b/libpdbg/sbefifo.c
@@ -271,6 +271,67 @@  static int sbefifo_pib_write(struct pib *pib, uint64_t addr, uint64_t val)
 	return sbefifo_scom_put(sctx, addr, val);
 }
 
+static int sbefifo_thread_probe(struct pdbg_target *target)
+{
+	struct thread *thread = target_to_thread(target);
+	uint32_t tid;
+
+	assert(!pdbg_target_u32_property(target, "tid", &tid));
+	thread->id = tid;
+
+	return 0;
+}
+
+static void sbefifo_thread_release(struct pdbg_target *target)
+{
+}
+
+static int sbefifo_thread_op(struct thread *thread, uint32_t oper)
+{
+	struct pdbg_target *chiplet =
+		pdbg_target_require_parent("chiplet", &thread->target);
+	struct pdbg_target *pib = pdbg_target_require_parent("pib", chiplet);
+	struct sbefifo *sbefifo = pib_to_sbefifo(pib);
+	struct sbefifo_context *sctx = sbefifo->get_sbefifo_context(sbefifo);
+	uint8_t mode = 0;
+
+	/* Enforce special-wakeup for thread stop and sreset */
+	if ((oper & 0xf) == SBEFIFO_INSN_OP_STOP ||
+	    (oper & 0xf) == SBEFIFO_INSN_OP_SRESET)
+		mode = 0x2;
+
+	/* This chip-op requires core-id as pervasive (chiplet) id */
+	return sbefifo_control_insn(sctx,
+				    pdbg_target_index(chiplet),
+				    thread->id,
+				    oper,
+				    mode);
+}
+static int sbefifo_thread_start(struct thread *thread)
+{
+	return sbefifo_thread_op(thread, SBEFIFO_INSN_OP_START);
+}
+
+static int sbefifo_thread_stop(struct thread *thread)
+{
+	return sbefifo_thread_op(thread, SBEFIFO_INSN_OP_STOP);
+}
+
+static int sbefifo_thread_step(struct thread *thread, int count)
+{
+	int i, rc = 0;
+
+	for (i = 0; i < count; i++)
+		rc |= sbefifo_thread_op(thread, SBEFIFO_INSN_OP_STEP);
+
+	return rc;
+}
+
+static int sbefifo_thread_sreset(struct thread *thread)
+{
+	return sbefifo_thread_op(thread, SBEFIFO_INSN_OP_SRESET);
+}
+
 static struct sbefifo_context *sbefifo_op_get_context(struct sbefifo *sbefifo)
 {
 	return sbefifo->sf_ctx;
@@ -352,6 +413,21 @@  static struct pib sbefifo_pib = {
 };
 DECLARE_HW_UNIT(sbefifo_pib);
 
+static struct thread sbefifo_thread = {
+	.target = {
+		.name = "SBE FFIO Chip-op based Thread",
+		.compatible = "ibm,power-thread",
+		.class = "thread",
+		.probe = sbefifo_thread_probe,
+		.release = sbefifo_thread_release,
+	},
+	.start = sbefifo_thread_start,
+	.stop = sbefifo_thread_stop,
+	.step = sbefifo_thread_step,
+	.sreset = sbefifo_thread_sreset,
+};
+DECLARE_HW_UNIT(sbefifo_thread);
+
 static struct sbefifo kernel_sbefifo = {
 	.target = {
 		.name =	"Kernel based FSI SBE FIFO",
@@ -370,6 +446,7 @@  static void register_sbefifo(void)
 	pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &kernel_sbefifo_hw_unit);
 	pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &sbefifo_chipop_hw_unit);
 	pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &sbefifo_pib_hw_unit);
+	pdbg_hwunit_register(PDBG_BACKEND_SBEFIFO, &sbefifo_thread_hw_unit);
 	pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &sbefifo_mem_hw_unit);
 	pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &sbefifo_pba_hw_unit);
 }