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Tue, 28 Aug 2018 18:51:13 -0700 (PDT) Received: from rashmica.ozlabs.ibm.com ([122.99.82.10]) by smtp.gmail.com with ESMTPSA id t14-v6sm3082571pgu.0.2018.08.28.18.51.11 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 28 Aug 2018 18:51:13 -0700 (PDT) From: Rashmica Gupta To: pdbg@lists.ozlabs.org Date: Wed, 29 Aug 2018 11:50:34 +1000 Message-Id: <20180829015047.7355-7-rashmica.g@gmail.com> X-Mailer: git-send-email 2.14.4 In-Reply-To: <20180829015047.7355-1-rashmica.g@gmail.com> References: <20180829015047.7355-1-rashmica.g@gmail.com> Subject: [Pdbg] [PATCH 06/19] libpdbg: Add in mtocrf and putcr function X-BeenThere: pdbg@lists.ozlabs.org X-Mailman-Version: 2.1.27 Precedence: list List-Id: "mailing list for https://github.com/open-power/pdbg development" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: npiggin@gmail.com MIME-Version: 1.0 Errors-To: pdbg-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Pdbg" Signed-off-by: Rashmica Gupta --- libpdbg/chip.c | 26 ++++++++++++++++++++++++++ libpdbg/libpdbg.h | 1 + libpdbg/operations.h | 1 + 3 files changed, 28 insertions(+) diff --git a/libpdbg/chip.c b/libpdbg/chip.c index 31c8c80..7a93ab6 100644 --- a/libpdbg/chip.c +++ b/libpdbg/chip.c @@ -52,6 +52,20 @@ static uint64_t mfocrf(uint64_t reg, uint64_t cr) return MFOCRF_OPCODE | (reg << 21) | (1U << (12 + cr)); } +static uint64_t mtocrf(uint64_t cr, uint64_t reg) +{ + if (reg > 31) { + PR_ERROR("Invalid register specified for mfocrf\n"); + exit(1); + } + if (cr > 7) { + PR_ERROR("Invalid CR field specified\n"); + exit(1); + } + + return MTOCRF_OPCODE | (reg << 21) | (1U << (12 + cr)); +} + static uint64_t mfnia(uint64_t reg) { if (reg > 31) @@ -303,6 +317,18 @@ int ram_getcr(struct pdbg_target *thread, uint32_t *value) return 0; } +int ram_putcr(struct pdbg_target *thread, uint32_t value) +{ + uint64_t opcodes[] = {mfspr(0, 277), mtocrf(0, 0), mtocrf(1, 0), + mtocrf(2, 0), mtocrf(3, 0), mtocrf(4, 0), + mtocrf(5, 0), mtocrf(6, 0), mtocrf(7, 0)}; + uint64_t results[] = {value}; + + CHECK_ERR(ram_instructions(thread, opcodes, results, ARRAY_SIZE(opcodes), 0)); + + return 0; +} + int ram_putmsr(struct pdbg_target *thread, uint64_t value) { uint64_t opcodes[] = {mfspr(0, 277), mtmsr(0)}; diff --git a/libpdbg/libpdbg.h b/libpdbg/libpdbg.h index 1239bba..25b2afd 100644 --- a/libpdbg/libpdbg.h +++ b/libpdbg/libpdbg.h @@ -143,6 +143,7 @@ int ram_putspr(struct pdbg_target *target, int spr, uint64_t val); int ram_putgpr(struct pdbg_target *target, int spr, uint64_t val); int ram_getmsr(struct pdbg_target *target, uint64_t *val); int ram_getcr(struct pdbg_target *thread, uint32_t *value); +int ram_putcr(struct pdbg_target *thread, uint32_t value); int ram_getnia(struct pdbg_target *target, uint64_t *val); int ram_getspr(struct pdbg_target *target, int spr, uint64_t *val); int ram_getgpr(struct pdbg_target *target, int gpr, uint64_t *val); diff --git a/libpdbg/operations.h b/libpdbg/operations.h index 4735c55..a0ed2cd 100644 --- a/libpdbg/operations.h +++ b/libpdbg/operations.h @@ -65,6 +65,7 @@ #define MFSPR_OPCODE 0x7c0002a6UL #define MTSPR_OPCODE 0x7c0003a6UL #define MFOCRF_OPCODE 0x7c100026UL +#define MTOCRF_OPCODE 0x7C100120UL #define MFSPR_MASK (MFSPR_OPCODE | ((0x1f) << 16) | ((0x3e0) << 6)) #define MFXER_OPCODE (MFSPR_OPCODE | ((1 & 0x1f) << 16) | ((1 & 0x3e0) << 6)) #define MTXER_OPCODE (MTSPR_OPCODE | ((1 & 0x1f) << 16) | ((1 & 0x3e0) << 6))