From patchwork Thu Aug 9 05:19:25 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amitay Isaacs X-Patchwork-Id: 955351 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [203.11.71.2]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 41mGln1fVwz9s4Z for ; Thu, 9 Aug 2018 15:19:49 +1000 (AEST) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=ozlabs.org Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; secure) header.d=ozlabs.org header.i=@ozlabs.org header.b="apShcZNv"; dkim-atps=neutral Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 41mGlm6xkhzDrH0 for ; Thu, 9 Aug 2018 15:19:48 +1000 (AEST) Authentication-Results: lists.ozlabs.org; dmarc=none (p=none dis=none) header.from=ozlabs.org Authentication-Results: lists.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; secure) header.d=ozlabs.org header.i=@ozlabs.org header.b="apShcZNv"; dkim-atps=neutral X-Original-To: pdbg@lists.ozlabs.org Delivered-To: pdbg@lists.ozlabs.org Received: from ozlabs.org (bilbo.ozlabs.org [203.11.71.1]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 41mGlW4ZcbzDqBy for ; Thu, 9 Aug 2018 15:19:35 +1000 (AEST) Authentication-Results: lists.ozlabs.org; dmarc=none (p=none dis=none) header.from=ozlabs.org Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; secure) header.d=ozlabs.org header.i=@ozlabs.org header.b="apShcZNv"; dkim-atps=neutral Received: from authenticated.ozlabs.org (localhost [127.0.0.1]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPSA id 41mGlW2FLMz9s7Q; Thu, 9 Aug 2018 15:19:35 +1000 (AEST) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=ozlabs.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ozlabs.org; s=201707; t=1533791975; bh=dHPZFbGndTVJ7B6PaBwojUiS3ZKxG7gEb0nrCBSciew=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=apShcZNvMIMohfmAZnxMzHfwiK9oLM01Tq6EHQrvyNHwEpRRY2hS631GQ5adzdyy/ kIarvZbzn+4RQDIL3CI24Y7/S8yk7rV4BiOXfozGssodlEy3xjh3I+K+MKLlJgmHt6 +cQ9u6lvtHud8iTjlmQqB4QbH1woS7O/una00wUfrpjTKWFi6xAF+oE9Thm1riMwnh XKIUnUQrsroa3ubfzYiCJmZibNVPaoEVUHWTx3F1eeMKVcK4HFKKEcLT2zGSEXioK9 kd8+7RWTjQg5ry3U3Fxsc/FpM1DgO9Nr5CU0xWfgL/K8SEr+N5PG2KjE2x+uilmHu3 0AMP51WBcG0yw== From: Amitay Isaacs To: pdbg@lists.ozlabs.org Date: Thu, 9 Aug 2018 15:19:25 +1000 Message-Id: <20180809051927.243483-4-amitay@ozlabs.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180809051927.243483-1-amitay@ozlabs.org> References: <20180809051927.243483-1-amitay@ozlabs.org> Subject: [Pdbg] [PATCH 3/5] main: Fix target selection of linux cpus X-BeenThere: pdbg@lists.ozlabs.org X-Mailman-Version: 2.1.27 Precedence: list List-Id: "mailing list for https://github.com/open-power/pdbg development" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Amitay Isaacs MIME-Version: 1.0 Errors-To: pdbg-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Pdbg" The selection should be applied to all the linux cpus in the list and not just the first one. Signed-off-by: Amitay Isaacs --- src/main.c | 16 +++++++--------- 1 file changed, 7 insertions(+), 9 deletions(-) diff --git a/src/main.c b/src/main.c index cfb01a8..d7c8589 100644 --- a/src/main.c +++ b/src/main.c @@ -496,18 +496,16 @@ static bool parse_options(int argc, char *argv[]) pir = get_pir(i); if (pir < 0) return true; - break; - } - } - if (pir < 0) - return true; - pir_map(pir, &chip, &core, &thread); + pir_map(pir, &chip, &core, &thread); - threadsel[chip][core][thread] = 1; - chipsel[chip][core] = &threadsel[chip][core][thread]; - processorsel[chip] = &chipsel[chip][core]; + processorsel[chip] = &chipsel[chip][0]; + chipsel[chip][core] = &threadsel[chip][core][0]; + threadsel[chip][core][thread] = 1; + } + } } + return true; }