From patchwork Thu Jun 7 06:54:29 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Neuling X-Patchwork-Id: 926171 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [203.11.71.2]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 411brZ5qlSz9s31 for ; Thu, 7 Jun 2018 16:54:54 +1000 (AEST) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=neuling.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 411brZ43SSzF32p for ; Thu, 7 Jun 2018 16:54:54 +1000 (AEST) Authentication-Results: lists.ozlabs.org; dmarc=none (p=none dis=none) header.from=neuling.org X-Original-To: pdbg@lists.ozlabs.org Delivered-To: pdbg@lists.ozlabs.org Received: from ozlabs.org (bilbo.ozlabs.org [203.11.71.1]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 411brK6kSHzF32G for ; Thu, 7 Jun 2018 16:54:41 +1000 (AEST) Authentication-Results: lists.ozlabs.org; dmarc=none (p=none dis=none) header.from=neuling.org Received: from localhost.localdomain (localhost [127.0.0.1]) by ozlabs.org (Postfix) with ESMTP id 411brK3pW0z9s1b; Thu, 7 Jun 2018 16:54:41 +1000 (AEST) Received: by localhost.localdomain (Postfix, from userid 1000) id 7A143EE791C; Thu, 7 Jun 2018 16:54:41 +1000 (AEST) From: Michael Neuling To: alistair@popple.id.au Date: Thu, 7 Jun 2018 16:54:29 +1000 Message-Id: <20180607065438.18257-2-mikey@neuling.org> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180607065438.18257-1-mikey@neuling.org> References: <20180607065438.18257-1-mikey@neuling.org> Subject: [Pdbg] [PATCH 02/11] Increase max processors for sparse chip id configs X-BeenThere: pdbg@lists.ozlabs.org X-Mailman-Version: 2.1.26 Precedence: list List-Id: "mailing list for https://github.com/open-power/pdbg development" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: pdbg@lists.ozlabs.org MIME-Version: 1.0 Errors-To: pdbg-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Pdbg" This bumps up the MAX_PROCESSORS to 64 so we support more machines. On a Tuletta with 2 DCMS, we end up with chip ids 0, 1, 16 and 17. We can't use the last two chips with the current setting. Signed-off-by: Michael Neuling --- src/main.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/main.c b/src/main.c index 26e141076e..1422c3f7bb 100644 --- a/src/main.c +++ b/src/main.c @@ -69,7 +69,7 @@ static enum backend backend = KERNEL; static char const *device_node; static int i2c_addr = 0x50; -#define MAX_PROCESSORS 16 +#define MAX_PROCESSORS 64 #define MAX_CHIPS 24 #define MAX_THREADS THREADS_PER_CORE