From 8face311b2bbabd46f1398a3ec3800aff1247875 Mon Sep 17 00:00:00 2001
From: Roger Pueyo Centelles <roger.pueyo@guifi.net>
Date: Sat, 9 Jan 2016 20:05:24 +0100
Subject: [PATCH] ar71xx: add preliminary support for YunCore CPE-880
---
target/linux/ar71xx/base-files/etc/board.d/01_leds | 6 ++
.../linux/ar71xx/base-files/etc/board.d/02_network | 5 +
target/linux/ar71xx/base-files/etc/diag.sh | 3 +
target/linux/ar71xx/base-files/lib/ar71xx.sh | 3 +
.../ar71xx/base-files/lib/upgrade/platform.sh | 1 +
target/linux/ar71xx/config-4.1 | 1 +
.../ar71xx/files/arch/mips/ath79/Kconfig.openwrt | 10 ++
target/linux/ar71xx/files/arch/mips/ath79/Makefile | 1 +
.../ar71xx/files/arch/mips/ath79/mach-cpe-880.c | 113 +++++++++++++++++++++
.../linux/ar71xx/files/arch/mips/ath79/machtypes.h | 1 +
target/linux/ar71xx/generic/profiles/yuncore.mk | 17 ++++
target/linux/ar71xx/image/Makefile | 2 +
target/linux/ar71xx/mikrotik/config-default | 1 +
13 files changed, 164 insertions(+)
create mode 100644 target/linux/ar71xx/files/arch/mips/ath79/mach-cpe-880.c
create mode 100644 target/linux/ar71xx/generic/profiles/yuncore.mk
@@ -137,6 +137,12 @@ cpe510)
ucidef_set_led_rssi "rssihigh" "RSSIHIGH" "tp-link:green:link4" "wlan0" "76" "100" "-75" "13"
;;
+cpe-880)
+ ucidef_set_led_switch "lan" "LAN" "yuncore:green:lan" "switch0" "0x10"
+ ucidef_set_led_switch "wan" "WAN" "yuncore:green:wan" "switch0" "0x20"
+ ucidef_set_led_wlan "wlan" "WLAN" "yuncore:green:5g8" "phy0tpt"
+ ;;
+
cr3000)
ucidef_set_led_netdev "wan" "WAN" "pcs:blue:wan" "eth1"
ucidef_set_led_switch "lan1" "LAN1" "pcs:blue:lan1" "switch0" "0x04"
@@ -76,6 +76,11 @@ cpe510)
"0@eth0" "5:lan" "4:wan"
;;
+cpe-880)
+ ucidef_add_switch "switch0" \
+ "0@eth0" "4:lan" "5:wan"
+ ;;
+
airgatewaypro)
ucidef_add_switch "switch0" \
"0@eth0" "4:lan" "5:wan"
@@ -73,6 +73,9 @@ get_status_led() {
cpe510)
status_led="tp-link:green:link4"
;;
+ cpe-880)
+ status_led="yuncore:green:link4"
+ ;;
cr3000)
status_led="pcs:amber:power"
;;
@@ -998,6 +998,9 @@ ar71xx_board_detect() {
*WHR-HP-G300N)
name="whr-hp-g300n"
;;
+ *CPE-880)
+ name="cpe-880"
+ ;;
*ZCN-1523H-2)
name="zcn-1523h-2"
;;
@@ -206,6 +206,7 @@ platform_check_image() {
ap132 | \
c-55 | \
cf-e316n-v2 | \
+ cpe-880 | \
dgl-5500-a1 |\
dhp-1565-a1 |\
dir-505-a1 | \
@@ -57,6 +57,7 @@ CONFIG_ATH79_MACH_CAP4200AG=y
CONFIG_ATH79_MACH_CARAMBOLA2=y
CONFIG_ATH79_MACH_CF_E316N_V2=y
CONFIG_ATH79_MACH_CPE510=y
+CONFIG_ATH79_MACH_CPE_880=y
CONFIG_ATH79_MACH_CR3000=y
CONFIG_ATH79_MACH_CR5000=y
CONFIG_ATH79_MACH_DB120=y
@@ -1389,6 +1389,16 @@ config ATH79_MACH_MYNET_REXT
select ATH79_DEV_WMAC
select ATH79_NVRAM
+config ATH79_MACH_CPE_880
+ bool "YunCore CPE-880 support"
+ select SOC_AR934X
+ select ATH79_DEV_ETH
+ select ATH79_DEV_GPIO_BUTTONS
+ select ATH79_DEV_LEDS_GPIO
+ select ATH79_DEV_M25P80
+ select ATH79_DEV_WMAC
+ select ATH79_NVRAM
+
config ATH79_MACH_ZCN_1523H
bool "Zcomax ZCN-1523H support"
select SOC_AR724X
@@ -64,6 +64,7 @@ obj-$(CONFIG_ATH79_MACH_CAP324) += mach-cap324.o
obj-$(CONFIG_ATH79_MACH_CAP4200AG) += mach-cap4200ag.o
obj-$(CONFIG_ATH79_MACH_CF_E316N_V2) += mach-cf-e316n-v2.o
obj-$(CONFIG_ATH79_MACH_CPE510) += mach-cpe510.o
+obj-$(CONFIG_ATH79_MACH_CPE_880) += mach-cpe-880.o
obj-$(CONFIG_ATH79_MACH_CR3000) += mach-cr3000.o
obj-$(CONFIG_ATH79_MACH_CR5000) += mach-cr5000.o
obj-$(CONFIG_ATH79_MACH_DB120) += mach-db120.o
new file mode 100644
@@ -0,0 +1,113 @@
+/*
+ * YunCore CPE-880 board support
+ *
+ * Copyright (C) 2015 Roger Pueyo Centelles <roger.pueyo@guifi.net>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ */
+
+#include <linux/gpio.h>
+#include <linux/platform_device.h>
+
+#include <asm/mach-ath79/ath79.h>
+#include <asm/mach-ath79/ar71xx_regs.h>
+
+#include "common.h"
+#include "dev-eth.h"
+#include "dev-gpio-buttons.h"
+#include "dev-leds-gpio.h"
+#include "dev-m25p80.h"
+#include "dev-wmac.h"
+#include "machtypes.h"
+
+
+#define CPE_880_GPIO_LED_LAN 19
+#define CPE_880_GPIO_LED_WAN 18
+#define CPE_880_GPIO_LED_DS1 17
+#define CPE_880_GPIO_LED_DS2 20
+#define CPE_880_GPIO_LED_DS3 21
+#define CPE_880_GPIO_LED_DS4 22
+#define CPE_880_GPIO_LED_5G8 12
+
+#define CPE_880_GPIO_BTN_RESET 4
+
+#define CPE_880_KEYS_POLL_INTERVAL 20 /* msecs */
+#define CPE_880_KEYS_DEBOUNCE_INTERVAL (3 * CPE_880_KEYS_POLL_INTERVAL)
+
+
+static struct gpio_led cpe_880_leds_gpio[] __initdata = {
+ {
+ .name = "yuncore:green:lan",
+ .gpio = CPE_880_GPIO_LED_LAN,
+ .active_low = 1,
+ }, {
+ .name = "yuncore:green:wan",
+ .gpio = CPE_880_GPIO_LED_WAN,
+ .active_low = 1,
+ }, {
+ .name = "yuncore:green:link1",
+ .gpio = CPE_880_GPIO_LED_DS1,
+ .active_low = 1,
+ }, {
+ .name = "yuncore:green:link2",
+ .gpio = CPE_880_GPIO_LED_DS2,
+ .active_low = 1,
+ }, {
+ .name = "yuncore:green:link3",
+ .gpio = CPE_880_GPIO_LED_DS3,
+ .active_low = 1,
+ }, {
+ .name = "yuncore:green:link4",
+ .gpio = CPE_880_GPIO_LED_DS4,
+ .active_low = 1,
+ }, {
+ .name = "yuncore:green:5g8",
+ .gpio = CPE_880_GPIO_LED_5G8,
+ .active_low = 1,
+ },
+};
+
+static struct gpio_keys_button cpe_880_gpio_keys[] __initdata = {
+ {
+ .desc = "Reset button",
+ .type = EV_KEY,
+ .code = KEY_RESTART,
+ .debounce_interval = CPE_880_KEYS_DEBOUNCE_INTERVAL,
+ .gpio = CPE_880_GPIO_BTN_RESET,
+ .active_low = 1,
+ }
+};
+
+
+static void __init cpe_880_setup(void)
+{
+ u8 *mac = (u8 *) KSEG1ADDR(0x1fff0000);
+ u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000);
+
+ /* Disable JTAG, enabling GPIOs 0-3 */
+ /* Configure OBS4 line, for GPIO 4*/
+ ath79_gpio_function_setup(AR934X_GPIO_FUNC_JTAG_DISABLE,
+ AR934X_GPIO_FUNC_CLK_OBS4_EN);
+
+ ath79_register_leds_gpio(-1, ARRAY_SIZE(cpe_880_leds_gpio),
+ cpe_880_leds_gpio);
+
+ ath79_register_gpio_keys_polled(1, CPE_880_KEYS_POLL_INTERVAL,
+ ARRAY_SIZE(cpe_880_gpio_keys),
+ cpe_880_gpio_keys);
+
+ ath79_register_m25p80(NULL);
+
+ ath79_register_mdio(1, 0);
+ ath79_init_mac(ath79_eth1_data.mac_addr, mac, 0);
+ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII;
+ ath79_register_eth(1);
+
+ ath79_register_wmac(ee, mac+0x1002);
+}
+
+MIPS_MACHINE(ATH79_MACH_CPE_880, "CPE-880", "YunCore CPE-880",
+ cpe_880_setup);
+
@@ -49,6 +49,7 @@ enum ath79_mach_type {
ATH79_MACH_CARAMBOLA2, /* 8devices Carambola2 */
ATH79_MACH_CF_E316N_V2, /* COMFAST CF-E316N v2 */
ATH79_MACH_CPE510, /* TP-LINK CPE510 */
+ ATH79_MACH_CPE_880, /* YunCore CPE-880 */
ATH79_MACH_CR3000, /* PowerCloud CR3000 */
ATH79_MACH_CR5000, /* PowerCloud CR5000 */
ATH79_MACH_DB120, /* Atheros DB120 reference board */
new file mode 100644
@@ -0,0 +1,17 @@
+#
+# Copyright (C) 2015 OpenWrt.org
+#
+# This is free software, licensed under the GNU General Public License v2.
+# See /LICENSE for more information.
+#
+
+
+define Profile/CPE_880
+ NAME:=YunCore CPE-880
+ PACKAGES:=
+endef
+
+define Profile/CPE_880/Description
+ Package set optimized for the YunCore CPE-880.
+endef
+$(eval $(call Profile,CPE_880))
@@ -1544,6 +1544,7 @@ cameo_db120_mtdlayout=mtdparts=spi0.0:64k(uboot)ro,64k(nvram)ro,15936k(firmware)
cameo_db120_mtdlayout_8M=mtdparts=spi0.0:64k(uboot)ro,64k(nvram)ro,7872k(firmware),128k(lang)ro,64k(art)ro
cap4200ag_mtdlayout=mtdparts=spi0.0:256k(u-boot),64k(u-boot-env),320k(custom)ro,1536k(kernel),12096k(rootfs),2048k(failsafe),64k(art),13632k@0xa0000(firmware)
cpe510_mtdlayout=mtdparts=spi0.0:128k(u-boot)ro,64k(pation-table)ro,64k(product-info)ro,1536k(kernel),6144k(rootfs),192k(config)ro,64k(ART)ro,7680k@0x40000(firmware)
+cpe-880_mtdlayout=mtdparts=spi0.0:64k(u-boot)ro,64k(u-boot-env)ro,3456k(rootfs),1024k(kernel),3456k(rootfs1),64k(nvram),64k(ART)ro,7936k@0x20000(firmware)
eap300v2_mtdlayout=mtdparts=spi0.0:256k(u-boot)ro,64k(u-boot-env),320k(custom),13632k(firmware),2048k(failsafe),64k(art)ro
db120_mtdlayout=mtdparts=spi0.0:256k(u-boot)ro,64k(u-boot-env)ro,6336k(rootfs),1408k(kernel),64k(nvram),64k(art)ro,7744k@0x50000(firmware)
dgl_5500_mtdlayout=mtdparts=spi0.0:192k(u-boot)ro,64k(nvram)ro,15296k(firmware),192k(lang)ro,512k(my-dlink)ro,64k(mac)ro,64k(art)ro
@@ -2354,6 +2355,7 @@ $(eval $(call SingleProfile,AthLzma,64k,AP147_010,ap147-010,AP147-010,ttyS0,1152
$(eval $(call SingleProfile,AthLzma,64k,AP152_16M,ap152-16M,AP152,ttyS0,115200,$$(ap152_mtdlayout_16M),RKuImage))
$(eval $(call SingleProfile,AthLzma,64k,BXU2000N2,bxu2000n-2-a1,BXU2000n-2-A1,ttyS0,115200,$$(bxu2000n2_mtdlayout),RKuImage))
$(eval $(call SingleProfile,AthLzma,64k,CAP4200AG,cap4200ag,CAP4200AG,ttyS0,115200,$$(cap4200ag_mtdlayout),KRuImage))
+$(eval $(call SingleProfile,AthLzma,64k,CPE_880,cpe-880,CPE-880,ttyS0,115200,$$(cpe-880_mtdlayout),RKuImage))
$(eval $(call SingleProfile,AthLzma,64k,DB120,db120,DB120,ttyS0,115200,$$(db120_mtdlayout),RKuImage))
$(eval $(call SingleProfile,AthLzma,64k,DRAGINO2,dragino2,DRAGINO2,ttyATH0,115200,$$(dragino2_mtdlayout),KRuImage,65536))
$(eval $(call SingleProfile,AthLzma,64k,EWDORINAP,ew-dorin,EW-DORIN,ttyATH0,115200,$$(ew-dorin_mtdlayout_4M),KRuImage,65536))
@@ -19,6 +19,7 @@
# CONFIG_ATH79_MACH_CAP4200AG is not set
# CONFIG_ATH79_MACH_CARAMBOLA2 is not set
# CONFIG_ATH79_MACH_CPE510 is not set
+# CONFIG_ATH79_MACH_CPE_880 is not set
# CONFIG_ATH79_MACH_CR3000 is not set
# CONFIG_ATH79_MACH_CR5000 is not set
# CONFIG_ATH79_MACH_DB120 is not set
--
2.6.4