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[2001:470:26:54b:226:9eff:fe70:80c2]) by smtp.gmail.com with ESMTPSA id c9sm398197ljk.53.2021.09.30.10.15.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 30 Sep 2021 10:15:47 -0700 (PDT) Received: from home.paul.comp (home.paul.comp [IPv6:0:0:0:0:0:0:0:1]) by home.paul.comp (8.15.2/8.15.2/Debian-14~deb10u1) with ESMTP id 18UHFi4u013844; Thu, 30 Sep 2021 20:15:45 +0300 Received: (from paul@localhost) by home.paul.comp (8.15.2/8.15.2/Submit) id 18UHFi90013843; Thu, 30 Sep 2021 20:15:44 +0300 From: Paul Fertser To: openwrt-devel@lists.openwrt.org Cc: Sander Vanheule , Paul Fertser Subject: [PATCH v2] realtek: ensure output drivers are enabled in RTL8231 Date: Thu, 30 Sep 2021 20:15:41 +0300 Message-Id: <20210930171541.13804-1-fercerpav@gmail.com> X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210930_101550_940300_DFB71145 X-CRM114-Status: GOOD ( 12.19 ) X-Spam-Score: -0.2 (/) X-Spam-Report: Spam detection software, running on the system "bombadil.infradead.org", has NOT identified this incoming email as spam. The original message has been attached to this so you can view it or label similar future email. If you have any questions, see the administrator of that system for details. Content preview: The bootloader can leave the GPIO expander in a state which doesn't have output drivers enabled so GPIOs will properly work for input but output operations will have no effect. To avoid disrupting the boot in case the bootloader left direction and data registers in an inconsistent state (e.g. pulling SoC's reset to 0) reconfigure everything as input. Content analysis details: (-0.2 points, 5.0 required) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [2a00:1450:4864:20:0:0:0:130 listed in] [list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail provider [fercerpav[at]gmail.com] -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain X-BeenThere: openwrt-devel@lists.openwrt.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: OpenWrt Development List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "openwrt-devel" Errors-To: openwrt-devel-bounces+incoming=patchwork.ozlabs.org@lists.openwrt.org The bootloader can leave the GPIO expander in a state which doesn't have output drivers enabled so GPIOs will properly work for input but output operations will have no effect. To avoid disrupting the boot in case the bootloader left direction and data registers in an inconsistent state (e.g. pulling SoC's reset to 0) reconfigure everything as input. Signed-off-by: Paul Fertser Reviewed-by: Sander Vanheule --- Notes: Changes from v1: - Fix comment to mention we affect two extra GPIOs - Remove unused "v" declaration. .../realtek/files-5.4/drivers/gpio/gpio-rtl8231.c | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) diff --git a/target/linux/realtek/files-5.4/drivers/gpio/gpio-rtl8231.c b/target/linux/realtek/files-5.4/drivers/gpio/gpio-rtl8231.c index a8ffcdc31368..f4f5621e0c1b 100644 --- a/target/linux/realtek/files-5.4/drivers/gpio/gpio-rtl8231.c +++ b/target/linux/realtek/files-5.4/drivers/gpio/gpio-rtl8231.c @@ -239,8 +239,6 @@ void rtl8231_gpio_set(struct gpio_chip *gc, unsigned int offset, int value) int rtl8231_init(struct rtl8231_gpios *gpios) { - u32 v; - pr_info("%s called, MDIO bus ID: %d\n", __func__, gpios->smi_bus_id); gpios->reg_cached = 0; @@ -254,11 +252,15 @@ int rtl8231_init(struct rtl8231_gpios *gpios) sw_w32_mask(3, 1, RTL838X_DMY_REG5); } - /* Select GPIO functionality for pins 0-34 */ + /* Select GPIO functionality and force input direction for pins 0-36 */ rtl8231_write(gpios, RTL8231_GPIO_PIN_SEL(0), 0xffff); + rtl8231_write(gpios, RTL8231_GPIO_DIR(0), 0xffff); rtl8231_write(gpios, RTL8231_GPIO_PIN_SEL(16), 0xffff); - v = rtl8231_read(gpios, RTL8231_GPIO_PIN_SEL(32)); - rtl8231_write(gpios, RTL8231_GPIO_PIN_SEL(32), v | 0x7); + rtl8231_write(gpios, RTL8231_GPIO_DIR(16), 0xffff); + rtl8231_write(gpios, RTL8231_GPIO_PIN_SEL(32), 0x03ff); + + /* Set LED_Start to enable drivers for output mode */ + rtl8231_write(gpios, RTL8231_LED_FUNC0, 1 << 1); return 0; }