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[2001:470:26:54b:226:9eff:fe70:80c2]) by smtp.gmail.com with ESMTPSA id v28sm529708lfi.22.2021.09.17.06.11.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 17 Sep 2021 06:11:28 -0700 (PDT) Received: from home.paul.comp (home.paul.comp [IPv6:0:0:0:0:0:0:0:1]) by home.paul.comp (8.15.2/8.15.2/Debian-14~deb10u1) with ESMTP id 18HDBPLR014098; Fri, 17 Sep 2021 16:11:27 +0300 Received: (from paul@localhost) by home.paul.comp (8.15.2/8.15.2/Submit) id 18HDBPOV014097; Fri, 17 Sep 2021 16:11:25 +0300 From: Paul Fertser To: openwrt-devel@lists.openwrt.org Cc: Paul Fertser Subject: [PATCH] realtek: fix RTL8231 gpio expander for high GPIOs Date: Fri, 17 Sep 2021 16:11:21 +0300 Message-Id: <20210917131121.14057-1-fercerpav@gmail.com> X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210917_061142_108107_C243695C X-CRM114-Status: GOOD ( 11.28 ) X-Spam-Score: -0.2 (/) X-Spam-Report: Spam detection software, running on the system "bombadil.infradead.org", has NOT identified this incoming email as spam. The original message has been attached to this so you can view it or label similar future email. If you have any questions, see the administrator of that system for details. Content preview: GPIOs > 31 require special handling. This patch fixes both the initialisation (defaulting to input) and direction get/set operations. Runtime-tested on D-Link DGS-1210-10P-R1 which has "reset" button on GPIO[33]. Content analysis details: (-0.2 points, 5.0 required) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [2a00:1450:4864:20:0:0:0:136 listed in] [list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail provider [fercerpav[at]gmail.com] -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain X-BeenThere: openwrt-devel@lists.openwrt.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: OpenWrt Development List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "openwrt-devel" Errors-To: openwrt-devel-bounces+incoming=patchwork.ozlabs.org@lists.openwrt.org GPIOs > 31 require special handling. This patch fixes both the initialisation (defaulting to input) and direction get/set operations. Runtime-tested on D-Link DGS-1210-10P-R1 which has "reset" button on GPIO[33]. Signed-off-by: Paul Fertser --- .../realtek/files-5.4/drivers/gpio/gpio-rtl8231.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/target/linux/realtek/files-5.4/drivers/gpio/gpio-rtl8231.c b/target/linux/realtek/files-5.4/drivers/gpio/gpio-rtl8231.c index 031f60f5307c..ddb8894663ec 100644 --- a/target/linux/realtek/files-5.4/drivers/gpio/gpio-rtl8231.c +++ b/target/linux/realtek/files-5.4/drivers/gpio/gpio-rtl8231.c @@ -106,12 +106,11 @@ static int rtl8231_pin_dir(struct rtl8231_gpios *gpios, u32 gpio, u32 dir) u32 v; int pin_sel_addr = RTL8231_GPIO_PIN_SEL(gpio); int pin_dir_addr = RTL8231_GPIO_DIR(gpio); - int pin = gpio % 16; - int dpin = pin; + int dpin = gpio % 16; if (gpio > 31) { pr_debug("WARNING: HIGH pin\n"); - dpin = pin << 5; + dpin += 5; pin_dir_addr = pin_sel_addr; } @@ -140,7 +139,7 @@ static int rtl8231_pin_dir_get(struct rtl8231_gpios *gpios, u32 gpio, u32 *dir) if (gpio > 31) { pin_dir_addr = RTL8231_GPIO_PIN_SEL(gpio); - pin = pin << 5; + pin += 5; } v = rtl8231_read(gpios, pin_dir_addr); @@ -253,9 +252,10 @@ int rtl8231_init(struct rtl8231_gpios *gpios) sw_w32_mask(3, 1, RTL838X_DMY_REG5); } - /*Select GPIO functionality for pins 0-15, 16-31 and 32-37 */ + /*Select GPIO functionality for pins 0-15, 16-31 and 32-34 */ rtl8231_write(gpios, RTL8231_GPIO_PIN_SEL(0), 0xffff); rtl8231_write(gpios, RTL8231_GPIO_PIN_SEL(16), 0xffff); + rtl8231_write(gpios, RTL8231_GPIO_PIN_SEL(32), 7 | (7 << 5)); return 0; }