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[213.113.123.174]) by smtp.gmail.com with ESMTPSA id f2-v6sm954453lfb.11.2018.07.04.12.20.49 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 04 Jul 2018 12:20:49 -0700 (PDT) From: Linus Walleij To: linux-arm-kernel@lists.infradead.org, Hans Ulli Kroll , Florian Fainelli Date: Wed, 4 Jul 2018 21:17:58 +0200 Message-Id: <20180704191759.12577-2-linus.walleij@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180704191759.12577-1-linus.walleij@linaro.org> References: <20180704191759.12577-1-linus.walleij@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20180704_122103_100399_5474B1A1 X-CRM114-Status: GOOD ( 15.66 ) X-Spam-Score: 0.1 (/) X-Spam-Report: SpamAssassin version 3.4.1 on bombadil.infradead.org summary: Content analysis details: (0.1 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at http://www.dnswl.org/, no trust [2a00:1450:4864:20:0:0:0:241 listed in] [list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid 0.0 T_DKIM_INVALID DKIM-Signature header exists but is not valid Subject: [OpenWrt-Devel] [PATCH 2/3] ARM: dts: Att Vitesse G5e switch to the Gemini SQ201 X-BeenThere: openwrt-devel@lists.openwrt.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Linus Walleij , LEDE Development List MIME-Version: 1.0 Sender: "openwrt-devel" Errors-To: openwrt-devel-bounces+incoming=patchwork.ozlabs.org@lists.openwrt.org This adds the Vitesse G5e ethernet switch to the Square One Itian SQ201 router device tree. Signed-off-by: Linus Walleij --- arch/arm/boot/dts/gemini-sq201.dts | 75 +++++++++++++++++++++++++++++- 1 file changed, 73 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/gemini-sq201.dts b/arch/arm/boot/dts/gemini-sq201.dts index 2706b86e06f1..830c167012a0 100644 --- a/arch/arm/boot/dts/gemini-sq201.dts +++ b/arch/arm/boot/dts/gemini-sq201.dts @@ -20,7 +20,7 @@ }; chosen { - bootargs = "console=ttyS0,115200n8"; + bootargs = "console=ttyS0,115200n8 root=/dev/sda1 rw rootwait"; stdout-path = &uart0; }; @@ -70,6 +70,61 @@ }; }; + spi { + compatible = "spi-gpio"; + #address-cells = <1>; + #size-cells = <0>; + /* Check pin collisions */ + gpio-sck = <&gpio1 28 GPIO_ACTIVE_HIGH>; + gpio-miso = <&gpio1 30 GPIO_ACTIVE_HIGH>; + gpio-mosi = <&gpio1 29 GPIO_ACTIVE_HIGH>; + cs-gpios = <&gpio1 31 GPIO_ACTIVE_HIGH>; + num-chipselects = <1>; + + switch@0 { + compatible = "vitesse,vsc7395"; + reg = <0>; + /* Specified for 2.5 MHz or below */ + spi-max-frequency = <2500000>; + gpio-controller; + #gpio-cells = <2>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + label = "lan1"; + }; + port@1 { + reg = <1>; + label = "lan2"; + }; + port@2 { + reg = <2>; + label = "lan3"; + }; + port@3 { + reg = <3>; + label = "lan4"; + }; + vsc: port@6 { + reg = <6>; + label = "cpu"; + ethernet = <&gmac1>; + phy-mode = "rgmii"; + fixed-link { + speed = <1000>; + full-duplex; + pause; + }; + }; + }; + }; + }; + + soc { flash@30000000 { /* @@ -135,6 +190,16 @@ "gpio0kgrp"; }; }; + /* + * gpio0dgrp cover lines used by the SPI + * to the Vitesse G5x chip. + */ + gpio1_default_pins: pinctrl-gpio1 { + mux { + function = "gpio1"; + groups = "gpio1dgrp"; + }; + }; pinctrl-gmii { mux { function = "gmii"; @@ -205,6 +270,11 @@ pinctrl-0 = <&gpio0_default_pins>; }; + gpio1: gpio@4e000000 { + pinctrl-names = "default"; + pinctrl-0 = <&gpio1_default_pins>; + }; + pci@50000000 { status = "okay"; interrupt-map-mask = <0xf800 0 0 7>; @@ -235,7 +305,8 @@ phy-handle = <&phy0>; }; ethernet-port@1 { - /* Used for the Vitesse G5 chip, add later */ + phy-mode = "rgmii"; + phy-handle = <&vsc>; }; };