From patchwork Thu May 19 18:21:03 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sven Eckelmann X-Patchwork-Id: 624191 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from arrakis.dune.hu (caladan.dune.hu [78.24.191.180]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3r9fhR0QlJz9sdg for ; Fri, 20 May 2016 04:28:22 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=open-mesh-com.20150623.gappssmtp.com header.i=@open-mesh-com.20150623.gappssmtp.com header.b=M4/jCMj8; dkim-atps=neutral Received: from arrakis.dune.hu (localhost [127.0.0.1]) by arrakis.dune.hu (Postfix) with ESMTP id 57816B9207F; Thu, 19 May 2016 20:22:53 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.1 (2015-04-28) on arrakis.dune.hu X-Spam-Level: X-Spam-Status: No, score=-1.5 required=5.0 tests=BAYES_00,T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.1 Received: from arrakis.dune.hu (localhost [127.0.0.1]) by arrakis.dune.hu (Postfix) with ESMTP; Thu, 19 May 2016 20:22:53 +0200 (CEST) Received: from arrakis.dune.hu (localhost [127.0.0.1]) by arrakis.dune.hu (Postfix) with ESMTP id 2A6F8B91FE6 for ; Thu, 19 May 2016 20:22:05 +0200 (CEST) X-policyd-weight: using cached result; rate: -7 Received: from mail-wm0-f49.google.com (mail-wm0-f49.google.com [74.125.82.49]) by arrakis.dune.hu (Postfix) with ESMTPS for ; Thu, 19 May 2016 20:22:05 +0200 (CEST) Received: by mail-wm0-f49.google.com with SMTP id w143so439380wmw.0 for ; Thu, 19 May 2016 11:22:05 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=open-mesh-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=E/+j65LIgQ4y3RuzY/L6aXaekIv7m2+AEFEIXcyXnAM=; b=M4/jCMj8VI9Vlgp/0paXXfIXp6uMJYeaorR2sPFzQDlSVO76p8vkhmUELi3qXzAeD5 YRxfCSepaNWJ0IgJjDsyaNypj9e1C+o0yPpYVDbrH+LtkbjrRoVRs1xxdGkLr2BDedSn sEat35ZD8dP1zzz2V5EfoWqONsZrD5UbtsffRHw8iR6JINocmnJgEQGdMNcGv+kOqNKs BEaj+wgUnCAiM/WlYYHpmhRSuglZBjzPr3cxyYE6gXSm8ZeFPR+5tuqENgRmMpOtvIBD hqKdf0WCz+evtGPwfe6rl6njX5v96zLoH/SD36806glMVRW9fHRAhnOHKxikLnBbtaX7 6jzw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=E/+j65LIgQ4y3RuzY/L6aXaekIv7m2+AEFEIXcyXnAM=; b=XqcjSP2mlRvl4bTUmDW2veuVG7ykZhgdByC2b8o670l9CUt1onfKrEaKOrWjCC7rRn V4ICkd2TQurCf/fB7vkLsmrRy50V39p/W1quNLmbZW2fOY0Ngo7mjiZ8XHcVngiJf+oG 6hAifenBlwcouFKaUjTI1avlh5rgGlUmBNdVZ6//HFTeBvOpzcIEQTJpf3M0UvnREleb uF+ElVZ/D/prYS3+oc1tVIvwPilw8D4XHbD8r9n4o+C0ET1LI3i8w6n1Occ5ESY3BVCF IOipTJNkWAo/hjc9J0L1zygJrq8TNlUnJgsIuPSpWLqzVHpp9JMmBKLAUkp43aE6nD+M AyeA== X-Gm-Message-State: AOPr4FXegZWEv9xduKqL2tum7ZWq9m9Ejcy4LTQ/zyIxSzJuOlmANQy1emGFMyGlNO5KXWem X-Received: by 10.28.113.218 with SMTP id d87mr16220473wmi.52.1463682124657; Thu, 19 May 2016 11:22:04 -0700 (PDT) Received: from sven-desktop.home.narfation.org (p579E6DC9.dip0.t-ipconnect.de. [87.158.109.201]) by smtp.gmail.com with ESMTPSA id hm7sm15653176wjb.41.2016.05.19.11.22.03 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 19 May 2016 11:22:04 -0700 (PDT) From: Sven Eckelmann To: openwrt-devel@lists.openwrt.org Date: Thu, 19 May 2016 20:21:03 +0200 Message-Id: <1463682077-19339-20-git-send-email-sven.eckelmann@open-mesh.com> X-Mailer: git-send-email 2.8.1 In-Reply-To: <1463682077-19339-1-git-send-email-sven.eckelmann@open-mesh.com> References: <1463682077-19339-1-git-send-email-sven.eckelmann@open-mesh.com> Subject: [OpenWrt-Devel] [PATCH CC 20/34] ar71xx: add kernel support for the OpenMesh OM5P-AC board X-BeenThere: openwrt-devel@lists.openwrt.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: OpenWrt Development List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Sven Eckelmann MIME-Version: 1.0 Errors-To: openwrt-devel-bounces@lists.openwrt.org Sender: "openwrt-devel" Signed-off-by: Sven Eckelmann Backport of r49141 --- target/linux/ar71xx/config-3.18 | 1 + .../ar71xx/files/arch/mips/ath79/mach-om5pac.c | 193 +++++++++++++++++++++ .../815-MIPS-ath79-add-om5pac-support.patch | 38 ++++ 3 files changed, 232 insertions(+) create mode 100644 target/linux/ar71xx/files/arch/mips/ath79/mach-om5pac.c create mode 100644 target/linux/ar71xx/patches-3.18/815-MIPS-ath79-add-om5pac-support.patch diff --git a/target/linux/ar71xx/config-3.18 b/target/linux/ar71xx/config-3.18 index 2354c9c..9a66711 100644 --- a/target/linux/ar71xx/config-3.18 +++ b/target/linux/ar71xx/config-3.18 @@ -91,6 +91,7 @@ CONFIG_ATH79_MACH_NBG460N=y CONFIG_ATH79_MACH_NBG6716=y CONFIG_ATH79_MACH_OM2P=y CONFIG_ATH79_MACH_OM5P=y +CONFIG_ATH79_MACH_OM5P_AC=y CONFIG_ATH79_MACH_ONION_OMEGA=y CONFIG_ATH79_MACH_PB42=y CONFIG_ATH79_MACH_PB44=y diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-om5pac.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-om5pac.c new file mode 100644 index 0000000..f6974af --- /dev/null +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-om5pac.c @@ -0,0 +1,193 @@ +/* + * OpenMesh OM5P-AC support + * + * Copyright (C) 2013 Marek Lindner + * Copyright (C) 2014 Sven Eckelmann + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +#include "common.h" +#include "dev-ap9x-pci.h" +#include "dev-eth.h" +#include "dev-leds-gpio.h" +#include "dev-m25p80.h" +#include "dev-wmac.h" +#include "machtypes.h" +#include "pci.h" + +#define OM5PAC_GPIO_LED_POWER 18 +#define OM5PAC_GPIO_LED_GREEN 21 +#define OM5PAC_GPIO_LED_RED 23 +#define OM5PAC_GPIO_LED_YELLOW 22 +#define OM5PAC_GPIO_LED_LAN 20 +#define OM5PAC_GPIO_LED_WAN 19 +#define OM5PAC_GPIO_I2C_SCL 12 +#define OM5PAC_GPIO_I2C_SDA 11 + +#define OM5PAC_KEYS_POLL_INTERVAL 20 /* msecs */ +#define OM5PAC_KEYS_DEBOUNCE_INTERVAL (3 * OM5PAC_KEYS_POLL_INTERVAL) + +#define OM5PAC_WMAC_CALDATA_OFFSET 0x1000 + +static struct gpio_led om5pac_leds_gpio[] __initdata = { + { + .name = "om5pac:blue:power", + .gpio = OM5PAC_GPIO_LED_POWER, + .active_low = 1, + }, { + .name = "om5pac:red:wifi", + .gpio = OM5PAC_GPIO_LED_RED, + .active_low = 1, + }, { + .name = "om5pac:yellow:wifi", + .gpio = OM5PAC_GPIO_LED_YELLOW, + .active_low = 1, + }, { + .name = "om5pac:green:wifi", + .gpio = OM5PAC_GPIO_LED_GREEN, + .active_low = 1, + }, { + .name = "om5pac:blue:lan", + .gpio = OM5PAC_GPIO_LED_LAN, + .active_low = 1, + }, { + .name = "om5pac:blue:wan", + .gpio = OM5PAC_GPIO_LED_WAN, + .active_low = 1, + } +}; + +static struct flash_platform_data om5pac_flash_data = { + .type = "mx25l12805d", +}; + +static struct i2c_gpio_platform_data om5pac_i2c_device_platdata = { + .sda_pin = OM5PAC_GPIO_I2C_SDA, + .scl_pin = OM5PAC_GPIO_I2C_SCL, + .udelay = 10, + .sda_is_open_drain = 1, + .scl_is_open_drain = 1, +}; + +static struct platform_device om5pac_i2c_device = { + .name = "i2c-gpio", + .id = 0, + .dev = { + .platform_data = &om5pac_i2c_device_platdata, + }, +}; + +static struct i2c_board_info om5pac_i2c_devs[] __initdata = { + { + I2C_BOARD_INFO("tmp423", 0x4c), + }, +}; + +static struct at803x_platform_data om5pac_at803x_data = { + .disable_smarteee = 1, + .enable_rgmii_rx_delay = 1, + .enable_rgmii_tx_delay = 1, +}; + +static struct mdio_board_info om5pac_mdio0_info[] = { + { + .bus_id = "ag71xx-mdio.0", + .phy_addr = 1, + .platform_data = &om5pac_at803x_data, + }, + { + .bus_id = "ag71xx-mdio.0", + .phy_addr = 2, + .platform_data = &om5pac_at803x_data, + }, +}; + +static void __init om5p_ac_setup_qca955x_eth_cfg(u32 mask, + unsigned int rxd, + unsigned int rxdv, + unsigned int txd, + unsigned int txe) +{ + void __iomem *base; + u32 t; + + base = ioremap(QCA955X_GMAC_BASE, QCA955X_GMAC_SIZE); + + t = mask; + t |= rxd << QCA955X_ETH_CFG_RXD_DELAY_SHIFT; + t |= rxdv << QCA955X_ETH_CFG_RDV_DELAY_SHIFT; + t |= txd << QCA955X_ETH_CFG_TXD_DELAY_SHIFT; + t |= txe << QCA955X_ETH_CFG_TXE_DELAY_SHIFT; + + __raw_writel(t, base + QCA955X_GMAC_REG_ETH_CFG); + + iounmap(base); +} + +static void __init om5p_ac_setup(void) +{ + u8 *art = (u8 *)KSEG1ADDR(0x1fff0000); + u8 mac[6]; + + /* temperature sensor */ + platform_device_register(&om5pac_i2c_device); + i2c_register_board_info(0, om5pac_i2c_devs, + ARRAY_SIZE(om5pac_i2c_devs)); + + ath79_gpio_output_select(OM5PAC_GPIO_LED_WAN, QCA955X_GPIO_OUT_GPIO); + + ath79_register_m25p80(&om5pac_flash_data); + ath79_register_leds_gpio(-1, ARRAY_SIZE(om5pac_leds_gpio), + om5pac_leds_gpio); + + ath79_init_mac(mac, art, 0x02); + ath79_register_wmac(art + OM5PAC_WMAC_CALDATA_OFFSET, mac); + + om5p_ac_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN, 3, 3, 0, 0); + ath79_register_mdio(0, 0x0); + + mdiobus_register_board_info(om5pac_mdio0_info, + ARRAY_SIZE(om5pac_mdio0_info)); + + ath79_init_mac(ath79_eth0_data.mac_addr, art, 0x00); + ath79_init_mac(ath79_eth1_data.mac_addr, art, 0x01); + + /* GMAC0 is connected to the PHY1 */ + ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; + ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev; + ath79_eth0_data.phy_mask = BIT(1); + ath79_eth0_pll_data.pll_1000 = 0x82000101; + ath79_eth0_pll_data.pll_100 = 0x80000101; + ath79_eth0_pll_data.pll_10 = 0x80001313; + ath79_register_eth(0); + + /* GMAC1 is connected to MDIO1 in SGMII mode */ + ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_SGMII; + ath79_eth1_data.mii_bus_dev = &ath79_mdio0_device.dev; + ath79_eth1_data.phy_mask = BIT(2); + ath79_eth1_pll_data.pll_1000 = 0x03000101; + ath79_eth1_pll_data.pll_100 = 0x80000101; + ath79_eth1_pll_data.pll_10 = 0x80001313; + ath79_eth1_data.speed = SPEED_1000; + ath79_eth1_data.duplex = DUPLEX_FULL; + ath79_register_eth(1); + + ath79_register_pci(); +} + +MIPS_MACHINE(ATH79_MACH_OM5P_AC, "OM5P-AC", "OpenMesh OM5P AC", om5p_ac_setup); diff --git a/target/linux/ar71xx/patches-3.18/815-MIPS-ath79-add-om5pac-support.patch b/target/linux/ar71xx/patches-3.18/815-MIPS-ath79-add-om5pac-support.patch new file mode 100644 index 0000000..4accd03 --- /dev/null +++ b/target/linux/ar71xx/patches-3.18/815-MIPS-ath79-add-om5pac-support.patch @@ -0,0 +1,38 @@ +--- a/arch/mips/ath79/Kconfig ++++ b/arch/mips/ath79/Kconfig +@@ -799,6 +799,15 @@ config ATH79_MACH_OM5P + select ATH79_DEV_M25P80 + select ATH79_DEV_WMAC + ++config ATH79_MACH_OM5P_AC ++ bool "OpenMesh OM5P-AC board support" ++ select SOC_QCA955X ++ select ATH79_DEV_AP9X_PCI if PCI ++ select ATH79_DEV_ETH ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_M25P80 ++ select ATH79_DEV_WMAC ++ + config ATH79_MACH_ONION_OMEGA + bool "ONION OMEGA support" + select SOC_AR933X +--- a/arch/mips/ath79/Makefile ++++ b/arch/mips/ath79/Makefile +@@ -100,6 +100,7 @@ obj-$(CONFIG_ATH79_MACH_MZK_W300NH) += m + obj-$(CONFIG_ATH79_MACH_NBG460N) += mach-nbg460n.o + obj-$(CONFIG_ATH79_MACH_OM2P) += mach-om2p.o + obj-$(CONFIG_ATH79_MACH_OM5P) += mach-om5p.o ++obj-$(CONFIG_ATH79_MACH_OM5P_AC) += mach-om5pac.o + obj-$(CONFIG_ATH79_MACH_ONION_OMEGA) += mach-onion-omega.o + obj-$(CONFIG_ATH79_MACH_PB42) += mach-pb42.o + obj-$(CONFIG_ATH79_MACH_PB44) += mach-pb44.o +--- a/arch/mips/ath79/machtypes.h ++++ b/arch/mips/ath79/machtypes.h +@@ -95,6 +95,7 @@ enum ath79_mach_type { + ATH79_MACH_OM2P_LC, /* OpenMesh OM2P-LC */ + ATH79_MACH_OM2Pv2, /* OpenMesh OM2Pv2 */ + ATH79_MACH_OM2P, /* OpenMesh OM2P */ ++ ATH79_MACH_OM5P_AC, /* OpenMesh OM5P-AC */ + ATH79_MACH_OM5P_AN, /* OpenMesh OM5P-AN */ + ATH79_MACH_OM5P, /* OpenMesh OM5P */ + ATH79_MACH_ONION_OMEGA, /* ONION OMEGA */