From patchwork Thu Oct 8 14:16:03 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mingyu Li X-Patchwork-Id: 527732 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from arrakis.dune.hu (arrakis.dune.hu [78.24.191.176]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 08137140D93 for ; Fri, 9 Oct 2015 01:19:36 +1100 (AEDT) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b=AoLTrXMx; dkim-atps=neutral Received: from arrakis.dune.hu (localhost [127.0.0.1]) by arrakis.dune.hu (Postfix) with ESMTP id 4957228C760; Thu, 8 Oct 2015 16:15:56 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.3.2 (2011-06-06) on arrakis.dune.hu X-Spam-Level: X-Spam-Status: No, score=-1.5 required=5.0 tests=BAYES_00,FREEMAIL_FROM, T_DKIM_INVALID autolearn=unavailable version=3.3.2 Received: from arrakis.dune.hu (localhost [127.0.0.1]) by arrakis.dune.hu (Postfix) with ESMTP id F36CE28C746 for ; Thu, 8 Oct 2015 16:14:57 +0200 (CEST) X-policyd-weight: using cached result; rate:hard: -8.5 Received: from mail-pa0-f45.google.com (mail-pa0-f45.google.com [209.85.220.45]) by arrakis.dune.hu (Postfix) with ESMTPS for ; Thu, 8 Oct 2015 16:14:55 +0200 (CEST) Received: by padhy16 with SMTP id hy16so56307220pad.1 for ; Thu, 08 Oct 2015 07:16:18 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=DYpc4f80ZzjGi78BPP2B6vp68qycE+Tsyp6EbPruGEw=; b=AoLTrXMxdp2fx+0nS0iU7O+6wS5l9Z3VY6+9kt84P6XUdidBsO9gePFO+1uLI7sY/l N3M+uYvWJALecI4ubrAltEsQSfh8dsIO8WiGInPH4bCnj68pFUSpFe69gwoP1cigeAzA ghaiGFF5dHddBVPygwyQeWLkoiSgfywXwDoKWtbUcX1HARfd4FqJsOVpD07ORNxQfxWK P+yQhtfwHFnRKChUF41adwrV7qcLKPKpiha7szbkj9eFjZNy6KQ7FHqjKVBCZCUxdJwt wexXzJEm3y1H0k2vMkbrJ2pefPn6sf5/Jlg+LvClvHUOeNqPRvtja4l453isDUPwEE+r TSwQ== X-Received: by 10.68.57.143 with SMTP id i15mr8544350pbq.104.1444313778895; Thu, 08 Oct 2015 07:16:18 -0700 (PDT) Received: from localhost.localdomain (f45hc114.RAS.nctu.edu.tw. [140.113.45.114]) by smtp.gmail.com with ESMTPSA id hq8sm46122436pad.35.2015.10.08.07.16.17 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 08 Oct 2015 07:16:18 -0700 (PDT) From: Michael Lee To: blogic@openwrt.org Date: Thu, 8 Oct 2015 22:16:03 +0800 Message-Id: <1444313768-23970-3-git-send-email-igvtee@gmail.com> X-Mailer: git-send-email 2.3.6 In-Reply-To: <1444313768-23970-1-git-send-email-igvtee@gmail.com> References: <1444313768-23970-1-git-send-email-igvtee@gmail.com> Cc: openwrt-devel@lists.openwrt.org Subject: [OpenWrt-Devel] [PATCH 3/8] ramips: improve rt2880 spi wait ready function X-BeenThere: openwrt-devel@lists.openwrt.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: OpenWrt Development List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: openwrt-devel-bounces@lists.openwrt.org Sender: "openwrt-devel" use loops_per_jiffy, spi clock speed and write bytes to get the spi loop count. if loop to 0 than spi operation timeout. remove usleep. we only write 1 byte to spi device. use busy loop would be better. Signed-off-by: Michael Lee --- ...0050-SPI-ralink-add-Ralink-SoC-spi-driver.patch | 31 +++++++++++----------- 1 file changed, 15 insertions(+), 16 deletions(-) diff --git a/target/linux/ramips/patches-3.18/0050-SPI-ralink-add-Ralink-SoC-spi-driver.patch b/target/linux/ramips/patches-3.18/0050-SPI-ralink-add-Ralink-SoC-spi-driver.patch index d6a462c..00fdeed 100644 --- a/target/linux/ramips/patches-3.18/0050-SPI-ralink-add-Ralink-SoC-spi-driver.patch +++ b/target/linux/ramips/patches-3.18/0050-SPI-ralink-add-Ralink-SoC-spi-driver.patch @@ -41,7 +41,7 @@ Acked-by: John Crispin spi-s3c24xx-hw-$(CONFIG_SPI_S3C24XX_FIQ) += spi-s3c24xx-fiq.o --- /dev/null +++ b/drivers/spi/spi-rt2880.c -@@ -0,0 +1,480 @@ +@@ -0,0 +1,479 @@ +/* + * spi-rt2880.c -- Ralink RT288x/RT305x SPI controller driver + * @@ -70,8 +70,6 @@ Acked-by: John Crispin +#define DRIVER_NAME "spi-rt2880" +/* only one slave is supported*/ +#define RALINK_NUM_CHIPSELECTS 1 -+/* in usec */ -+#define RALINK_SPI_WAIT_MAX_LOOP 2000 + +#define RAMIPS_SPI_STAT 0x00 +#define RAMIPS_SPI_CFG 0x10 @@ -173,6 +171,7 @@ Acked-by: John Crispin + void __iomem *base; + unsigned int sys_freq; + unsigned int speed; ++ u16 wait_loops; + struct clk *clk; +}; + @@ -238,6 +237,11 @@ Acked-by: John Crispin + reg = rt2880_spi_read(rs, RAMIPS_SPI_CFG); + reg = ((reg & ~SPICFG_SPICLK_PRESCALE_MASK) | prescale); + rt2880_spi_write(rs, RAMIPS_SPI_CFG, reg); ++ ++ /* some tolerance. double and add 100 */ ++ rs->wait_loops = (8 * HZ * loops_per_jiffy) / ++ (clk_get_rate(rs->clk) / rate); ++ rs->wait_loops = (rs->wait_loops << 1) + 100; + rs->speed = speed; + return 0; +} @@ -273,20 +277,15 @@ Acked-by: John Crispin + rt2880_spi_setbits(rs, RAMIPS_SPI_CTL, SPICTL_SPIENA); +} + -+static inline int rt2880_spi_wait_till_ready(struct rt2880_spi *rs) ++static int rt2880_spi_wait_ready(struct rt2880_spi *rs, int len) +{ -+ int i; -+ -+ for (i = 0; i < RALINK_SPI_WAIT_MAX_LOOP; i++) { -+ u32 status; -+ -+ status = rt2880_spi_read(rs, RAMIPS_SPI_STAT); -+ if ((status & SPISTAT_BUSY) == 0) -+ return 0; ++ int loop = rs->wait_loops * len; + ++ while ((rt2880_spi_read(rs, RAMIPS_SPI_STAT) & SPISTAT_BUSY) && --loop) + cpu_relax(); -+ udelay(1); -+ } ++ ++ if (loop) ++ return 0; + + return -ETIMEDOUT; +} @@ -308,7 +307,7 @@ Acked-by: John Crispin + for (count = 0; count < xfer->len; count++) { + rt2880_spi_write(rs, RAMIPS_SPI_DATA, tx[count]); + rt2880_spi_setbits(rs, RAMIPS_SPI_CTL, SPICTL_STARTWR); -+ err = rt2880_spi_wait_till_ready(rs); ++ err = rt2880_spi_wait_ready(rs, 1); + if (err) { + dev_err(&spi->dev, "TX failed, err=%d\n", err); + goto out; @@ -319,7 +318,7 @@ Acked-by: John Crispin + if (rx) { + for (count = 0; count < xfer->len; count++) { + rt2880_spi_setbits(rs, RAMIPS_SPI_CTL, SPICTL_STARTRD); -+ err = rt2880_spi_wait_till_ready(rs); ++ err = rt2880_spi_wait_ready(rs, 1); + if (err) { + dev_err(&spi->dev, "RX failed, err=%d\n", err); + goto out;