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[OpenWrt-Devel,4/4] ar71xx: Increase RXD/RDV to 2 on OM5P-AN

Message ID 1429111522-12141-4-git-send-email-sven@open-mesh.com
State Accepted
Headers show

Commit Message

Sven Eckelmann April 15, 2015, 3:25 p.m. UTC
It was reported that OM5P-AN needs not only a delay setting of 1 for RXD/RDV
but 2. These was found when testing with a NetGear GS752TP POE switch with a
cable length of 50ft and 250ft.

Signed-off-by: Sven Eckelmann <sven@open-mesh.com>
---
 target/linux/ar71xx/files/arch/mips/ath79/mach-om5p.c | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)
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Patch

diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-om5p.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-om5p.c
index 298e80c..49acd3b 100644
--- a/target/linux/ar71xx/files/arch/mips/ath79/mach-om5p.c
+++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-om5p.c
@@ -186,9 +186,8 @@  static void __init om5p_an_setup(void)
 	ath79_init_mac(mac, art, 0x02);
 	ath79_register_wmac(art + OM5P_WMAC_CALDATA_OFFSET, mac);
 
-	ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0 |
-				   AR934X_ETH_CFG_RXD_DELAY |
-				   AR934X_ETH_CFG_RDV_DELAY);
+	ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0);
+	ath79_setup_ar934x_eth_rx_delay(2, 2);
 	ath79_register_mdio(0, 0x0);
 	ath79_register_mdio(1, 0x0);