diff --git a/target/linux/ramips/dts/mt7621.dtsi b/target/linux/ramips/dts/mt7621.dtsi
index 50cd144..f09ec3e 100644
--- a/target/linux/ramips/dts/mt7621.dtsi
+++ b/target/linux/ramips/dts/mt7621.dtsi
@@ -123,38 +123,38 @@
 		};
 		i2c_pins: i2c {
 			i2c {
-				lantiq,group = "i2c";
-				lantiq,function = "i2c";
+				ralink,group = "i2c";
+				ralink,function = "i2c";
 			};
 		};
 		uart1_pins: uart1 {
 			uart1 {
 				ralink,group = "uart1";
-				ralink,function = "uart";
+				ralink,function = "uart1";
 			};
 		};
 		uart2_pins: uart2 {
 			uart2 {
 				ralink,group = "uart2";
-				ralink,function = "uart";
+				ralink,function = "uart2";
 			};
 		};
 		uart3_pins: uart3 {
 			uart3 {
 				ralink,group = "uart3";
-				ralink,function = "uart";
+				ralink,function = "uart3";
 			};
 		};
 		rgmii1_pins: rgmii1 {
 			rgmii1 {
 				ralink,group = "rgmii1";
-				ralink,function = "rgmii";
+				ralink,function = "rgmii1";
 			};
 		};
 		rgmii2_pins: rgmii2 {
 			rgmii2 {
 				ralink,group = "rgmii2";
-				ralink,function = "rgmii";
+				ralink,function = "rgmii2";
 			};
 		};
 		mdio_pins: mdio {
@@ -172,11 +172,11 @@
 		nand_pins: nand {
 			spi-nand {
 				ralink,group = "spi";
-				ralink,function = "nand";
+				ralink,function = "nand1";
 			};
 			sdhci-nand {
 				ralink,group = "sdhci";
-				ralink,function = "nand";
+				ralink,function = "nand2";
 			};
 		};
 		sdhci_pins: sdhci {
diff --git a/target/linux/ramips/patches-3.18/0062-mt7621-fix-pinctrl.patch b/target/linux/ramips/patches-3.18/0062-mt7621-fix-pinctrl.patch
new file mode 100644
index 0000000..a963e5f
--- /dev/null
+++ b/target/linux/ramips/patches-3.18/0062-mt7621-fix-pinctrl.patch
@@ -0,0 +1,58 @@
+Index: linux-3.18.8/arch/mips/ralink/mt7621.c
+===================================================================
+--- linux-3.18.8.orig/arch/mips/ralink/mt7621.c	2015-03-17 10:46:49.290956084 +0800
++++ linux-3.18.8/arch/mips/ralink/mt7621.c	2015-03-17 14:54:21.823186689 +0800
+@@ -32,8 +32,8 @@
+ 
+ #define MT7621_GPIO_MODE_UART1		1
+ #define MT7621_GPIO_MODE_I2C		2
+-#define MT7621_GPIO_MODE_UART2		3
+-#define MT7621_GPIO_MODE_UART3		5
++#define MT7621_GPIO_MODE_UART2		5
++#define MT7621_GPIO_MODE_UART3		3
+ #define MT7621_GPIO_MODE_JTAG		7
+ #define MT7621_GPIO_MODE_WDT_MASK	0x3
+ #define MT7621_GPIO_MODE_WDT_SHIFT	8
+@@ -53,10 +53,10 @@
+ #define MT7621_GPIO_MODE_SDHCI_SHIFT	18
+ #define MT7621_GPIO_MODE_SDHCI_GPIO	1
+ 
+-static struct rt2880_pmx_func uart1_grp[] =  { FUNC("uart", 0, 1, 2) };
++static struct rt2880_pmx_func uart1_grp[] =  { FUNC("uart1", 0, 1, 2) };
+ static struct rt2880_pmx_func i2c_grp[] =  { FUNC("i2c", 0, 3, 2) };
+-static struct rt2880_pmx_func uart3_grp[] = { FUNC("uart", 0, 5, 4) };
+-static struct rt2880_pmx_func uart2_grp[] = { FUNC("uart", 0, 9, 4) };
++static struct rt2880_pmx_func uart3_grp[] = { FUNC("uart2", 0, 5, 4) };
++static struct rt2880_pmx_func uart2_grp[] = { FUNC("uart3", 0, 9, 4) };
+ static struct rt2880_pmx_func jtag_grp[] = { FUNC("jtag", 0, 13, 5) };
+ static struct rt2880_pmx_func wdt_grp[] = {
+ 	FUNC("wdt rst", 0, 18, 1),
+@@ -67,22 +67,22 @@
+ 	FUNC("pcie refclk", MT7621_GPIO_MODE_PCIE_REF, 19, 1)
+ };
+ static struct rt2880_pmx_func mdio_grp[] = { FUNC("mdio", 0, 20, 2) };
+-static struct rt2880_pmx_func rgmii2_grp[] = { FUNC("rgmii", 0, 22, 12) };
++static struct rt2880_pmx_func rgmii2_grp[] = { FUNC("rgmii2", 0, 22, 12) };
+ static struct rt2880_pmx_func spi_grp[] = {
+ 	FUNC("spi", 0, 34, 7),
+-	FUNC("nand", 2, 34, 8),
++	FUNC("nand1", 2, 34, 8),
+ };
+ static struct rt2880_pmx_func sdhci_grp[] = {
+ 	FUNC("sdhci", 0, 41, 8),
+-	FUNC("nand", 2, 41, 8),
++	FUNC("nand2", 2, 41, 8),
+ };
+-static struct rt2880_pmx_func rgmii1_grp[] = { FUNC("rgmii", 0, 49, 12) };
++static struct rt2880_pmx_func rgmii1_grp[] = { FUNC("rgmii1", 0, 49, 12) };
+ 
+ static struct rt2880_pmx_group mt7621_pinmux_data[] = {
+ 	GRP("uart1", uart1_grp, 1, MT7621_GPIO_MODE_UART1),
+ 	GRP("i2c", i2c_grp, 1, MT7621_GPIO_MODE_I2C),
+-	GRP("uart3", uart2_grp, 1, MT7621_GPIO_MODE_UART2),
+-	GRP("uart2", uart3_grp, 1, MT7621_GPIO_MODE_UART3),
++	GRP("uart2", uart2_grp, 1, MT7621_GPIO_MODE_UART2),
++	GRP("uart3", uart3_grp, 1, MT7621_GPIO_MODE_UART3),
+ 	GRP("jtag", jtag_grp, 1, MT7621_GPIO_MODE_JTAG),
+ 	GRP_G("wdt", wdt_grp, MT7621_GPIO_MODE_WDT_MASK,
+ 		MT7621_GPIO_MODE_WDT_GPIO, MT7621_GPIO_MODE_WDT_SHIFT),
