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([2a01:e0a:e17:9700:16d2:7456:6634:9626]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-378956d35dasm17084361f8f.67.2024.09.13.07.34.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 13 Sep 2024 07:34:28 -0700 (PDT) From: =?utf-8?b?Q2zDqW1lbnQgTMOpZ2Vy?= To: opensbi@lists.infradead.org Subject: [PATCH v2 5/6] lib: sbi: implement firmware feature SBI_FWFT_DOUBLE_TRAP Date: Fri, 13 Sep 2024 16:34:03 +0200 Message-ID: <20240913143419.3258868-6-cleger@rivosinc.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20240913143419.3258868-1-cleger@rivosinc.com> References: <20240913143419.3258868-1-cleger@rivosinc.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240913_073431_788256_8D551E7D X-CRM114-Status: GOOD ( 11.86 ) X-Spam-Score: -1.9 (-) X-Spam-Report: =?unknown-8bit?q?Spam_detection_software=2C_running_on_the_sy?= =?unknown-8bit?q?stem_=22bombadil=2Einfradead=2Eorg=22=2C?= =?unknown-8bit?q?_has_NOT_identified_this_incoming_email_as_spam=2E__The_ori?= =?unknown-8bit?q?ginal?= =?unknown-8bit?q?_message_has_been_attached_to_this_so_you_can_view_it_or_la?= =?unknown-8bit?q?bel?= =?unknown-8bit?q?_similar_future_email=2E__If_you_have_any_questions=2C_see?= =?unknown-8bit?q?_the_administrator_of_that_system_for_details=2E?= =?unknown-8bit?q?_?= =?unknown-8bit?q?_Content_preview=3A__Add_support_for_double_trap_firmware_f?= =?unknown-8bit?q?eature=2E_Link=3A_https=3A//lists=2Eriscv=2Eorg/g/tech-prs?= =?unknown-8bit?q?/message/985?= =?unknown-8bit?q?_=5B1=5D_Signed-off-by=3A_Cl=C3=A9ment_L=C3=A9ger_=3Ccleger?= =?unknown-8bit?q?=40rivosinc=2Ecom=3E_---_include/sbi/riscv=5Fencoding=2Eh?= =?unknown-8bit?q?_=7C_3_++-_lib/sbi/sbi=5Ffwft=2Ec_=7C_25_++++++++++++++++++?= =?unknown-8bit?q?+++++++_=5B=2E=2E=2E=5D_?= =?unknown-8bit?q?_?= =?unknown-8bit?q?_Content_analysis_details=3A___=28-1=2E9_points=2C_5=2E0_re?= =?unknown-8bit?q?quired=29?= =?unknown-8bit?q?_?= =?unknown-8bit?q?_pts_rule_name______________description?= =?unknown-8bit?q?_----_----------------------_------------------------------?= =?unknown-8bit?q?--------------------?= =?unknown-8bit?q?_-0=2E0_RCVD=5FIN=5FDNSWL=5FNONE_____RBL=3A_Sender_listed_a?= =?unknown-8bit?q?t_https=3A//www=2Ednswl=2Eorg/=2C_no?= =?unknown-8bit?q?_trust?= =?unknown-8bit?b?IFsyYTAwOjE0NTA6NDg2NDoyMDowOjA6MDo0MmMgbGlzdGVkIGluXQ==?= =?unknown-8bit?b?IFtsaXN0LmRuc3dsLm9yZ10=?= =?unknown-8bit?q?_-0=2E0_SPF=5FPASS_______________SPF=3A_sender_matches_SPF_?= =?unknown-8bit?q?record?= =?unknown-8bit?q?_0=2E0_SPF=5FHELO=5FNONE__________SPF=3A_HELO_does_not_publ?= =?unknown-8bit?q?ish_an_SPF_Record?= =?unknown-8bit?q?_-0=2E1_DKIM=5FVALID_____________Message_has_at_least_one_v?= =?unknown-8bit?q?alid_DKIM_or_DK_signature?= =?unknown-8bit?q?_0=2E1_DKIM=5FSIGNED____________Message_has_a_DKIM_or_DK_si?= =?unknown-8bit?q?gnature=2C_not_necessarily_valid?= =?unknown-8bit?q?_-1=2E9_BAYES=5F00_______________BODY=3A_Bayes_spam_probabi?= =?unknown-8bit?q?lity_is_0_to_1=25?= =?unknown-8bit?q?_=5Bscore=3A_0=2E0000=5D?= X-BeenThere: opensbi@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Anup Patel , =?utf-8?b?Q2zDqW1lbnQgTMOpZ2Vy?= , Atish Patra , Ved Shanbhogue Sender: "opensbi" Errors-To: opensbi-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org Add support for double trap firmware feature. Link: https://lists.riscv.org/g/tech-prs/message/985 [1] Signed-off-by: Clément Léger Reviewed-by: Samuel Holland --- include/sbi/riscv_encoding.h | 3 ++- lib/sbi/sbi_fwft.c | 25 +++++++++++++++++++++++++ 2 files changed, 27 insertions(+), 1 deletion(-) diff --git a/include/sbi/riscv_encoding.h b/include/sbi/riscv_encoding.h index 5b3bbc5..1d83434 100644 --- a/include/sbi/riscv_encoding.h +++ b/include/sbi/riscv_encoding.h @@ -214,7 +214,8 @@ #define ENVCFG_ADUE_SHIFT 61 #define ENVCFG_ADUE (_ULL(1) << ENVCFG_ADUE_SHIFT) #define ENVCFG_CDE (_ULL(1) << 60) -#define ENVCFG_DTE (_ULL(1) << 59) +#define ENVCFG_DTE_SHIFT 59 +#define ENVCFG_DTE (_ULL(1) << ENVCFG_DTE_SHIFT) #define ENVCFG_CBZE (_UL(1) << 7) #define ENVCFG_CBCFE (_UL(1) << 6) #define ENVCFG_CBIE_SHIFT 4 diff --git a/lib/sbi/sbi_fwft.c b/lib/sbi/sbi_fwft.c index c818afd..39bd592 100644 --- a/lib/sbi/sbi_fwft.c +++ b/lib/sbi/sbi_fwft.c @@ -155,6 +155,25 @@ static int fwft_get_adue(struct fwft_config *conf, unsigned long *value) return fwft_menvcfg_read_bit(value, ENVCFG_ADUE_SHIFT); } +static int fwft_double_trap_supported(struct fwft_config *conf) +{ + if (!sbi_hart_has_extension(sbi_scratch_thishart_ptr(), + SBI_HART_EXT_SSDBLTRP)) + return SBI_ENOTSUPP; + + return SBI_OK; +} + +static int fwft_set_double_trap(struct fwft_config *conf, unsigned long value) +{ + return fwft_menvcfg_set_bit(value, ENVCFG_DTE_SHIFT); +} + +static int fwft_get_double_trap(struct fwft_config *conf, unsigned long *value) +{ + return fwft_menvcfg_read_bit(value, ENVCFG_DTE_SHIFT); +} + static struct fwft_config* get_feature_config(enum sbi_fwft_feature_t feature) { int i; @@ -240,6 +259,12 @@ static const struct fwft_feature features[] = .set = fwft_set_misaligned_delegation, .get = fwft_get_misaligned_delegation, }, + { + .id = SBI_FWFT_DOUBLE_TRAP, + .supported = fwft_double_trap_supported, + .set = fwft_set_double_trap, + .get = fwft_get_double_trap, + }, { .id = SBI_FWFT_PTE_AD_HW_UPDATING, .supported = fwft_adue_supported,