Message ID | 20240913143419.3258868-6-cleger@rivosinc.com |
---|---|
State | Superseded |
Headers | show |
Series | lib: sbi: add Ssdbltrp and Smdbltrp ISA extensions | expand |
On 2024-09-13 9:34 AM, Clément Léger wrote: > Add support for double trap firmware feature. > > Link: https://lists.riscv.org/g/tech-prs/message/985 [1] > Signed-off-by: Clément Léger <cleger@rivosinc.com> > --- > include/sbi/riscv_encoding.h | 3 ++- > lib/sbi/sbi_fwft.c | 25 +++++++++++++++++++++++++ > 2 files changed, 27 insertions(+), 1 deletion(-) > > diff --git a/include/sbi/riscv_encoding.h b/include/sbi/riscv_encoding.h > index 5b3bbc5..1d83434 100644 > --- a/include/sbi/riscv_encoding.h > +++ b/include/sbi/riscv_encoding.h > @@ -214,7 +214,8 @@ > #define ENVCFG_ADUE_SHIFT 61 > #define ENVCFG_ADUE (_ULL(1) << ENVCFG_ADUE_SHIFT) > #define ENVCFG_CDE (_ULL(1) << 60) > -#define ENVCFG_DTE (_ULL(1) << 59) > +#define ENVCFG_DTE_SHIFT 59 > +#define ENVCFG_DTE (_ULL(1) << ENVCFG_DTE_SHIFT) > #define ENVCFG_CBZE (_UL(1) << 7) > #define ENVCFG_CBCFE (_UL(1) << 6) > #define ENVCFG_CBIE_SHIFT 4 > diff --git a/lib/sbi/sbi_fwft.c b/lib/sbi/sbi_fwft.c > index c818afd..39bd592 100644 > --- a/lib/sbi/sbi_fwft.c > +++ b/lib/sbi/sbi_fwft.c > @@ -155,6 +155,25 @@ static int fwft_get_adue(struct fwft_config *conf, unsigned long *value) > return fwft_menvcfg_read_bit(value, ENVCFG_ADUE_SHIFT); > } > > +static int fwft_double_trap_supported(struct fwft_config *conf) > +{ > + if (!sbi_hart_has_extension(sbi_scratch_thishart_ptr(), > + SBI_HART_EXT_SSDBLTRP)) > + return SBI_ENOTSUPP; > + > + return SBI_OK; > +} > + > +static int fwft_set_double_trap(struct fwft_config *conf, unsigned long value) > +{ > + return fwft_menvcfg_set_bit(value, ENVCFG_DTE_SHIFT); > +} > + > +static int fwft_get_double_trap(struct fwft_config *conf, unsigned long *value) > +{ > + return fwft_menvcfg_read_bit(value, ENVCFG_DTE_SHIFT); > +} > + nit: to be sorted, these functions should go above fwft_adue_supported(). But it's a trivial concern, so: Reviewed-by: Samuel Holland <samuel.holland@sifive.com> > static struct fwft_config* get_feature_config(enum sbi_fwft_feature_t feature) > { > int i; > @@ -240,6 +259,12 @@ static const struct fwft_feature features[] = > .set = fwft_set_misaligned_delegation, > .get = fwft_get_misaligned_delegation, > }, > + { > + .id = SBI_FWFT_DOUBLE_TRAP, > + .supported = fwft_double_trap_supported, > + .set = fwft_set_double_trap, > + .get = fwft_get_double_trap, > + }, > { > .id = SBI_FWFT_PTE_AD_HW_UPDATING, > .supported = fwft_adue_supported,
On 13/09/2024 20:11, Samuel Holland wrote: > On 2024-09-13 9:34 AM, Clément Léger wrote: >> Add support for double trap firmware feature. >> >> Link: https://lists.riscv.org/g/tech-prs/message/985 [1] >> Signed-off-by: Clément Léger <cleger@rivosinc.com> >> --- >> include/sbi/riscv_encoding.h | 3 ++- >> lib/sbi/sbi_fwft.c | 25 +++++++++++++++++++++++++ >> 2 files changed, 27 insertions(+), 1 deletion(-) >> >> diff --git a/include/sbi/riscv_encoding.h b/include/sbi/riscv_encoding.h >> index 5b3bbc5..1d83434 100644 >> --- a/include/sbi/riscv_encoding.h >> +++ b/include/sbi/riscv_encoding.h >> @@ -214,7 +214,8 @@ >> #define ENVCFG_ADUE_SHIFT 61 >> #define ENVCFG_ADUE (_ULL(1) << ENVCFG_ADUE_SHIFT) >> #define ENVCFG_CDE (_ULL(1) << 60) >> -#define ENVCFG_DTE (_ULL(1) << 59) >> +#define ENVCFG_DTE_SHIFT 59 >> +#define ENVCFG_DTE (_ULL(1) << ENVCFG_DTE_SHIFT) >> #define ENVCFG_CBZE (_UL(1) << 7) >> #define ENVCFG_CBCFE (_UL(1) << 6) >> #define ENVCFG_CBIE_SHIFT 4 >> diff --git a/lib/sbi/sbi_fwft.c b/lib/sbi/sbi_fwft.c >> index c818afd..39bd592 100644 >> --- a/lib/sbi/sbi_fwft.c >> +++ b/lib/sbi/sbi_fwft.c >> @@ -155,6 +155,25 @@ static int fwft_get_adue(struct fwft_config *conf, unsigned long *value) >> return fwft_menvcfg_read_bit(value, ENVCFG_ADUE_SHIFT); >> } >> >> +static int fwft_double_trap_supported(struct fwft_config *conf) >> +{ >> + if (!sbi_hart_has_extension(sbi_scratch_thishart_ptr(), >> + SBI_HART_EXT_SSDBLTRP)) >> + return SBI_ENOTSUPP; >> + >> + return SBI_OK; >> +} >> + >> +static int fwft_set_double_trap(struct fwft_config *conf, unsigned long value) >> +{ >> + return fwft_menvcfg_set_bit(value, ENVCFG_DTE_SHIFT); >> +} >> + >> +static int fwft_get_double_trap(struct fwft_config *conf, unsigned long *value) >> +{ >> + return fwft_menvcfg_read_bit(value, ENVCFG_DTE_SHIFT); >> +} >> + > > nit: to be sorted, these functions should go above fwft_adue_supported(). But > it's a trivial concern, so: Oh damn, I sorted the entries but not the functions. No worries, I'll resend a V3. Thanks, Clément > > Reviewed-by: Samuel Holland <samuel.holland@sifive.com> > >> static struct fwft_config* get_feature_config(enum sbi_fwft_feature_t feature) >> { >> int i; >> @@ -240,6 +259,12 @@ static const struct fwft_feature features[] = >> .set = fwft_set_misaligned_delegation, >> .get = fwft_get_misaligned_delegation, >> }, >> + { >> + .id = SBI_FWFT_DOUBLE_TRAP, >> + .supported = fwft_double_trap_supported, >> + .set = fwft_set_double_trap, >> + .get = fwft_get_double_trap, >> + }, >> { >> .id = SBI_FWFT_PTE_AD_HW_UPDATING, >> .supported = fwft_adue_supported, >
diff --git a/include/sbi/riscv_encoding.h b/include/sbi/riscv_encoding.h index 5b3bbc5..1d83434 100644 --- a/include/sbi/riscv_encoding.h +++ b/include/sbi/riscv_encoding.h @@ -214,7 +214,8 @@ #define ENVCFG_ADUE_SHIFT 61 #define ENVCFG_ADUE (_ULL(1) << ENVCFG_ADUE_SHIFT) #define ENVCFG_CDE (_ULL(1) << 60) -#define ENVCFG_DTE (_ULL(1) << 59) +#define ENVCFG_DTE_SHIFT 59 +#define ENVCFG_DTE (_ULL(1) << ENVCFG_DTE_SHIFT) #define ENVCFG_CBZE (_UL(1) << 7) #define ENVCFG_CBCFE (_UL(1) << 6) #define ENVCFG_CBIE_SHIFT 4 diff --git a/lib/sbi/sbi_fwft.c b/lib/sbi/sbi_fwft.c index c818afd..39bd592 100644 --- a/lib/sbi/sbi_fwft.c +++ b/lib/sbi/sbi_fwft.c @@ -155,6 +155,25 @@ static int fwft_get_adue(struct fwft_config *conf, unsigned long *value) return fwft_menvcfg_read_bit(value, ENVCFG_ADUE_SHIFT); } +static int fwft_double_trap_supported(struct fwft_config *conf) +{ + if (!sbi_hart_has_extension(sbi_scratch_thishart_ptr(), + SBI_HART_EXT_SSDBLTRP)) + return SBI_ENOTSUPP; + + return SBI_OK; +} + +static int fwft_set_double_trap(struct fwft_config *conf, unsigned long value) +{ + return fwft_menvcfg_set_bit(value, ENVCFG_DTE_SHIFT); +} + +static int fwft_get_double_trap(struct fwft_config *conf, unsigned long *value) +{ + return fwft_menvcfg_read_bit(value, ENVCFG_DTE_SHIFT); +} + static struct fwft_config* get_feature_config(enum sbi_fwft_feature_t feature) { int i; @@ -240,6 +259,12 @@ static const struct fwft_feature features[] = .set = fwft_set_misaligned_delegation, .get = fwft_get_misaligned_delegation, }, + { + .id = SBI_FWFT_DOUBLE_TRAP, + .supported = fwft_double_trap_supported, + .set = fwft_set_double_trap, + .get = fwft_get_double_trap, + }, { .id = SBI_FWFT_PTE_AD_HW_UPDATING, .supported = fwft_adue_supported,
Add support for double trap firmware feature. Link: https://lists.riscv.org/g/tech-prs/message/985 [1] Signed-off-by: Clément Léger <cleger@rivosinc.com> --- include/sbi/riscv_encoding.h | 3 ++- lib/sbi/sbi_fwft.c | 25 +++++++++++++++++++++++++ 2 files changed, 27 insertions(+), 1 deletion(-)