@@ -39,8 +39,12 @@ struct sbi_hsm_device {
*
* For successful non-retentive suspend, the hart will resume from
* the warm boot entry point.
+ *
+ * NOTE: mmode_resume_addr(resume address) is optional hence it
+ * may or may not be honored by the platform. If its not honored
+ * then platform must ensure to resume from the warmboot address.
*/
- int (*hart_suspend)(u32 suspend_type);
+ int (*hart_suspend)(u32 suspend_type, ulong mmode_resume_addr);
/**
* Perform platform-specific actions to resume from a suspended state.
@@ -228,10 +228,10 @@ static int hsm_device_hart_stop(void)
return SBI_ENOTSUPP;
}
-static int hsm_device_hart_suspend(u32 suspend_type)
+static int hsm_device_hart_suspend(u32 suspend_type, ulong mmode_resume_addr)
{
if (hsm_dev && hsm_dev->hart_suspend)
- return hsm_dev->hart_suspend(suspend_type);
+ return hsm_dev->hart_suspend(suspend_type, mmode_resume_addr);
return SBI_ENOTSUPP;
}
@@ -536,7 +536,7 @@ int sbi_hsm_hart_suspend(struct sbi_scratch *scratch, u32 suspend_type,
__sbi_hsm_suspend_non_ret_save(scratch);
/* Try platform specific suspend */
- ret = hsm_device_hart_suspend(suspend_type);
+ ret = hsm_device_hart_suspend(suspend_type, scratch->warmboot_addr);
if (ret == SBI_ENOTSUPP) {
/* Try generic implementation of default suspend types */
if (suspend_type == SBI_HSM_SUSPEND_RET_DEFAULT ||
@@ -152,7 +152,7 @@ static void sun20i_d1_riscv_cfg_init(void)
writel_relaxed(entry >> 32, SUN20I_D1_RISCV_CFG_BASE + RESET_ENTRY_HI_REG);
}
-static int sun20i_d1_hart_suspend(u32 suspend_type)
+static int sun20i_d1_hart_suspend(u32 suspend_type, ulong mmode_resume_addr)
{
/* Use the generic code for retentive suspend. */
if (!(suspend_type & SBI_HSM_SUSP_NON_RET_BIT))