From patchwork Thu Oct 19 11:37:05 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yu-Chien Peter Lin X-Patchwork-Id: 1851593 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; secure) header.d=lists.infradead.org header.i=@lists.infradead.org header.a=rsa-sha256 header.s=bombadil.20210309 header.b=t94Aaw+G; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=none (no SPF record) smtp.mailfrom=lists.infradead.org (client-ip=2607:7c80:54:3::133; helo=bombadil.infradead.org; envelope-from=opensbi-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org; receiver=patchwork.ozlabs.org) Received: from bombadil.infradead.org (bombadil.infradead.org [IPv6:2607:7c80:54:3::133]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1) server-digest SHA384) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4SB5Q760sNz23kJ for ; Thu, 19 Oct 2023 22:41:03 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=4u40uwAyAfIny39J+6M9ohcc8IJILAC3NrF1Oi7ylyk=; b=t94Aaw+GILLCDp diiBSnmEh77QG+MDsgKshKaQHffWiEpbd2jKGGF2Z27fT0q5MpX3J1zt7unhCMR3ctsWLWby+7Oh/ SWCIAqSKi3Lofyjbuj0cZjUSHJcRyVjbnBmseNYkrZnEiHCMHxoQCZqdnLF402k/t4v4YPZuF3BUs NtH3fkE9kwUO8hAlnTgISMl9Rf3KNBHpmVHTpWKIBDSM2BPGh2FyRStDo2L9OwCdboZZ7tUiHo9XW nJN/dMOwqMYIK2uT1OsI5/9HMc2scyL8VXURibeL1j7cr/Re4ZY96W3Vtis2VYsZQVGwl1cAZ+MYc tVfD4u84LW9BRYSW5LUg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qtROP-00HBxD-2P; Thu, 19 Oct 2023 11:40:45 +0000 Received: from 60-248-80-70.hinet-ip.hinet.net ([60.248.80.70] helo=Atcsqr.andestech.com) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1qtRON-00HBv8-0M for opensbi@lists.infradead.org; Thu, 19 Oct 2023 11:40:44 +0000 Received: from mail.andestech.com (ATCPCS16.andestech.com [10.0.1.222]) by Atcsqr.andestech.com with ESMTP id 39JBeVJ0049457; Thu, 19 Oct 2023 19:40:31 +0800 (+08) (envelope-from peterlin@andestech.com) Received: from swlinux02.andestech.com (10.0.15.183) by ATCPCS16.andestech.com (10.0.1.222) with Microsoft SMTP Server id 14.3.498.0; Thu, 19 Oct 2023 19:40:27 +0800 From: Yu Chien Peter Lin To: CC: , , , , , , , , Yu Chien Peter Lin Subject: [PATCH v2 03/11] platform: include: andes45: Add PMU related CSR defines Date: Thu, 19 Oct 2023 19:37:05 +0800 Message-ID: <20231019113713.3508153-4-peterlin@andestech.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231019113713.3508153-1-peterlin@andestech.com> References: <20231019113713.3508153-1-peterlin@andestech.com> MIME-Version: 1.0 X-Originating-IP: [10.0.15.183] X-DNSRBL: X-SPAM-SOURCE-CHECK: pass X-MAIL: Atcsqr.andestech.com 39JBeVJ0049457 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20231019_044043_589994_3C432F6E X-CRM114-Status: UNSURE ( 7.60 ) X-CRM114-Notice: Please train this message. X-Spam-Score: 0.4 (/) X-Spam-Report: Spam detection software, running on the system "bombadil.infradead.org", has NOT identified this incoming email as spam. The original message has been attached to this so you can view it or label similar future email. If you have any questions, see the administrator of that system for details. Content preview: This patch adds CSR for Andes PMU extension. Signed-off-by: Yu Chien Peter Lin Reviewed-by: Leo Yu-Chi Liang --- Changes v1 -> v2: - Rename andes_pmu() -> has_andes_pmu() --- platform/generic/incl [...] Content analysis details: (0.4 points, 5.0 required) pts rule name description ---- ---------------------- -------------------------------------------------- 0.0 TVD_RCVD_IP Message was received from an IP address -0.0 SPF_PASS SPF: sender matches SPF record 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record 0.4 RDNS_DYNAMIC Delivered to internal network by host with dynamic-looking rDNS X-BeenThere: opensbi@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "opensbi" Errors-To: opensbi-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org This patch adds CSR for Andes PMU extension. Signed-off-by: Yu Chien Peter Lin Reviewed-by: Leo Yu-Chi Liang Reviewed-by: Anup Patel --- Changes v1 -> v2: - Rename andes_pmu() -> has_andes_pmu() --- platform/generic/include/andes/andes45.h | 26 ++++++++++++++++++++++++ 1 file changed, 26 insertions(+) diff --git a/platform/generic/include/andes/andes45.h b/platform/generic/include/andes/andes45.h index f570994..ce31617 100644 --- a/platform/generic/include/andes/andes45.h +++ b/platform/generic/include/andes/andes45.h @@ -12,6 +12,17 @@ #define CSR_MDCM_CFG 0xfc1 #define CSR_MMSC_CFG 0xfc2 +/* Machine Trap Related Registers */ +#define CSR_MSLIDELEG 0x7d5 + +/* Counter Related Registers */ +#define CSR_MCOUNTERWEN 0x7ce +#define CSR_MCOUNTERINTEN 0x7cf +#define CSR_MCOUNTERMASK_M 0x7d1 +#define CSR_MCOUNTERMASK_S 0x7d2 +#define CSR_MCOUNTERMASK_U 0x7d3 +#define CSR_MCOUNTEROVF 0x7d4 + #define MICM_CFG_ISZ_OFFSET 6 #define MICM_CFG_ISZ_MASK (0x7 << MICM_CFG_ISZ_OFFSET) @@ -26,4 +37,19 @@ #define MCACHE_CTL_CCTL_SUEN_OFFSET 8 #define MCACHE_CTL_CCTL_SUEN_MASK (0x1 << MCACHE_CTL_CCTL_SUEN_OFFSET) +/* Performance monitor */ +#define MMSC_CFG_PMNDS_MASK (1 << 15) +#define MIP_PMOVI (1 << 18) + +#ifndef __ASSEMBLER__ + +#define has_andes_pmu() \ +({ \ + (((csr_read(CSR_MMSC_CFG) & \ + MMSC_CFG_PMNDS_MASK) \ + && misa_extension('S')) ? true : false); \ +}) + +#endif /* __ASSEMBLER__ */ + #endif /* _RISCV_ANDES45_H */