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The original message has been attached to this so you can view it or label similar future email. If you have any questions, see the administrator of that system for details. Content preview: - Add a function to disable a given PMP entry. - Add a function to check if a given entry is disabled. Signed-off-by: Himanshu Chauhan --- include/sbi/riscv_asm.h | 6 ++++++ lib/sbi/riscv_asm.c | 43 +++++++++++++++++++++++++++++++++++++++++ 2 files changed, 49 insertions(+) Content analysis details: (-0.2 points, 5.0 required) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [2607:f8b0:4864:20:0:0:0:432 listed in] [list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain X-BeenThere: opensbi@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "opensbi" Errors-To: opensbi-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org - Add a function to disable a given PMP entry. - Add a function to check if a given entry is disabled. Signed-off-by: Himanshu Chauhan Reviewed-by: Anup Patel --- include/sbi/riscv_asm.h | 6 ++++++ lib/sbi/riscv_asm.c | 43 +++++++++++++++++++++++++++++++++++++++++ 2 files changed, 49 insertions(+) diff --git a/include/sbi/riscv_asm.h b/include/sbi/riscv_asm.h index 1ff36de..2c34635 100644 --- a/include/sbi/riscv_asm.h +++ b/include/sbi/riscv_asm.h @@ -181,6 +181,12 @@ int misa_xlen(void); /* Get RISC-V ISA string representation */ void misa_string(int xlen, char *out, unsigned int out_sz); +/* Disable pmp entry at a given index */ +int pmp_disable(unsigned int n); + +/* Check if the matching field is set */ +int is_pmp_entry_mapped(unsigned long entry); + int pmp_set(unsigned int n, unsigned long prot, unsigned long addr, unsigned long log2len); diff --git a/lib/sbi/riscv_asm.c b/lib/sbi/riscv_asm.c index cd56553..0690721 100644 --- a/lib/sbi/riscv_asm.c +++ b/lib/sbi/riscv_asm.c @@ -246,6 +246,49 @@ static unsigned long ctz(unsigned long x) return ret; } +int pmp_disable(unsigned int n) +{ + int pmpcfg_csr, pmpcfg_shift; + unsigned long cfgmask, pmpcfg; + + if (n >= PMP_COUNT) + return SBI_EINVAL; + +#if __riscv_xlen == 32 + pmpcfg_csr = CSR_PMPCFG0 + (n >> 2); + pmpcfg_shift = (n & 3) << 3; +#elif __riscv_xlen == 64 + pmpcfg_csr = (CSR_PMPCFG0 + (n >> 2)) & ~1; + pmpcfg_shift = (n & 7) << 3; +#else +# error "Unexpected __riscv_xlen" +#endif + + /* Clear the address matching bits to disable the pmp entry */ + cfgmask = ~(0xffUL << pmpcfg_shift); + pmpcfg = (csr_read_num(pmpcfg_csr) & cfgmask); + pmpcfg &= (~PMP_A << pmpcfg_shift); + + csr_write_num(pmpcfg_csr, pmpcfg); + + return SBI_OK; +} + +int is_pmp_entry_mapped(unsigned long entry) +{ + unsigned long prot; + unsigned long addr; + unsigned long log2len; + + pmp_get(entry, &prot, &addr, &log2len); + + /* If address matching bits are non-zero, the entry is enable */ + if (prot & PMP_A) + return true; + + return false; +} + int pmp_set(unsigned int n, unsigned long prot, unsigned long addr, unsigned long log2len) {