From patchwork Thu Mar 9 05:51:12 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mayuresh Chitale X-Patchwork-Id: 1754427 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=none (no SPF record) smtp.mailfrom=lists.infradead.org (client-ip=2607:7c80:54:3::133; helo=bombadil.infradead.org; envelope-from=opensbi-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; secure) header.d=lists.infradead.org header.i=@lists.infradead.org header.a=rsa-sha256 header.s=bombadil.20210309 header.b=wjlh085H; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=ventanamicro.com header.i=@ventanamicro.com header.a=rsa-sha256 header.s=google header.b=Z1LE6Rch; dkim-atps=neutral Received: from bombadil.infradead.org (bombadil.infradead.org [IPv6:2607:7c80:54:3::133]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-384) server-digest SHA384) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4PXJGj4tTcz1yWp for ; Thu, 9 Mar 2023 16:51:57 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=B2Ugc9OPBVws/BOo16+yorW0ttvK3coKgraTtV8NRHg=; b=wjlh085Hl3LBh4 hHnrS8c70VdnlMc73y5ubWiSKS83m18r+CEzG4q1xNU774acgGP0AP2JK3EfEoi77/YNRLMzLcXkR XXlFNvRc6BZxupxC5d3AClv2dfj5agD2fbh30TSW4beRjDnGSDFY7PrM6W+yOTLAuGF69R07Vy05+ vyl8s/FhN1vFN6W2y6Ga/1wpd8lM3Roovi7tPXq6CtBOvBZSfTslUzUskM6SIQ3Jll9i622FBcPtj wBuAN0Id9jaY0q1HfQcyKPppUHs1ob6mXZet5IwXqfpAn+IAXUOLP4xTaJZ248GoGVz1tV3bHuLQd fhZdyRHfm6H/Fm0Mmozg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1pa9Bn-007zC3-Vj; Thu, 09 Mar 2023 05:51:43 +0000 Received: from mail-pl1-x62c.google.com ([2607:f8b0:4864:20::62c]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1pa9Bl-007z6U-I3 for opensbi@lists.infradead.org; Thu, 09 Mar 2023 05:51:43 +0000 Received: by mail-pl1-x62c.google.com with SMTP id i5so922399pla.2 for ; Wed, 08 Mar 2023 21:51:38 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1678341097; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=0SJuyGJunhFFCTrqCPgFVYSjwemqh6Tz6zEXvjW6phw=; b=Z1LE6Rch2tWd2VRnlO9bs8MY6IFy1QMA5hCwFggT0rypA74EyupGUQWc20M9kaam4E IAfXVcIxWebq0wPSrRADWPnVv274gOKZV8raaYpdRakpdROqjObqiEV0ZWFCK13NutXU /WL9Dm2dvSajTpuoVpwPkf8o6YABS6lRWHAFWg7LHM+NAXgGKqKH9AP77uIGWPYFj8Ko Rm1Yi35PdOVIMMWK2AmRDcl4wZdatpMu+XnaNF77XnzUq+lnIaff5A1BYOKqXhuqYCkT Gd6cFmAsdhEC4w2jEBLUXDKyXT8fJIEiEkRQh94CiYiRkF895+XWW+IPYdaqzW/7YDOz nemg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1678341097; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=0SJuyGJunhFFCTrqCPgFVYSjwemqh6Tz6zEXvjW6phw=; b=7jTn/8qo/hlAyLdFeN7PLtPr03HQ24VeKVS86jwvFGg/bT8qAZptFZ0fwEc6tmHFOj XD+ky402IJ0e+kwA/Y9PVVqTVICwxWw6CfvOp+YNiZtIFMwcXVrGO62QU1kexjWcSBr/ 57PZML5PMHNPiIuX+pySKXjERjBXsp/I5z4YXMfISuctvhPX/qDKBkjxTKrVzTqyLIEH BMPHuHdrF8tw1m3fwN+BClL8eNCoU49ethp4R0pZI9jvvab6p2Pbl29lQpzxYlv/Z0hk TPh6v1fjmhecRNrGUteFf5kwB8RuvKO3KZ6l4T1eLREocPG+1psKQ3SCaawzA4/MuVmu 7UzQ== X-Gm-Message-State: AO0yUKUEjVKa+4omWu8pFR+wMd5vdO6u0xtBB9tMWAW4hJAidpFt6/1S IrF+0b8IaTMG/M8llzWvT/MTao0KkXGuIEkgwrZgdQ== X-Google-Smtp-Source: AK7set/2ldf+53iZLl+9Jid2kvlLtZkdoHOjFpYd7Aez8Hl1am4XiLWEQx80W/N+eA9picoGaks6lg== X-Received: by 2002:a17:902:d2c3:b0:19a:f02c:a05b with SMTP id n3-20020a170902d2c300b0019af02ca05bmr26564396plc.3.1678341097465; Wed, 08 Mar 2023 21:51:37 -0800 (PST) Received: from mchitale-vm.. ([103.97.165.210]) by smtp.googlemail.com with ESMTPSA id 13-20020a170902e9cd00b0019ac9c4f32esm10590724plk.309.2023.03.08.21.51.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 08 Mar 2023 21:51:37 -0800 (PST) From: Mayuresh Chitale To: opensbi@lists.infradead.org Cc: Mayuresh Chitale , Atish Patra Subject: [PATCH v3 8/8] lib: sbi_pmu: Add hartid parameter PMU device ops Date: Thu, 9 Mar 2023 11:21:12 +0530 Message-Id: <20230309055112.1516581-9-mchitale@ventanamicro.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230309055112.1516581-1-mchitale@ventanamicro.com> References: <20230309055112.1516581-1-mchitale@ventanamicro.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230308_215141_633413_0B9F788F X-CRM114-Status: GOOD ( 12.48 ) X-Spam-Score: -0.2 (/) X-Spam-Report: Spam detection software, running on the system "bombadil.infradead.org", has NOT identified this incoming email as spam. The original message has been attached to this so you can view it or label similar future email. If you have any questions, see the administrator of that system for details. Content preview: Platform specific firmware event handler may leverage the hartid to program per hart specific registers for a given counter. Signed-off-by: Mayuresh Chitale Reviewed-by: Atish Patra --- include/sbi/sbi_pmu.h | 14 ++++++++------ lib/sbi/sbi_pmu.c | 25 +++++++++++++++--------- [...] Content analysis details: (-0.2 points, 5.0 required) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [2607:f8b0:4864:20:0:0:0:62c listed in] [list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain X-BeenThere: opensbi@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "opensbi" Errors-To: opensbi-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org Platform specific firmware event handler may leverage the hartid to program per hart specific registers for a given counter. Signed-off-by: Mayuresh Chitale Reviewed-by: Atish Patra Reviewed-by: Anup Patel --- include/sbi/sbi_pmu.h | 14 ++++++++------ lib/sbi/sbi_pmu.c | 25 +++++++++++++++---------- 2 files changed, 23 insertions(+), 16 deletions(-) diff --git a/include/sbi/sbi_pmu.h b/include/sbi/sbi_pmu.h index 53f2700..16f6877 100644 --- a/include/sbi/sbi_pmu.h +++ b/include/sbi/sbi_pmu.h @@ -31,13 +31,14 @@ struct sbi_pmu_device { /** * Validate event code of custom firmware event */ - int (*fw_event_validate_encoding)(uint64_t event_data); + int (*fw_event_validate_encoding)(uint32_t hartid, uint64_t event_data); /** * Match custom firmware counter with custom firmware event * Note: 0 <= counter_index < SBI_PMU_FW_CTR_MAX */ - bool (*fw_counter_match_encoding)(uint32_t counter_index, + bool (*fw_counter_match_encoding)(uint32_t hartid, + uint32_t counter_index, uint64_t event_data); /** @@ -49,27 +50,28 @@ struct sbi_pmu_device { * Read value of custom firmware counter * Note: 0 <= counter_index < SBI_PMU_FW_CTR_MAX */ - uint64_t (*fw_counter_read_value)(uint32_t counter_index); + uint64_t (*fw_counter_read_value)(uint32_t hartid, + uint32_t counter_index); /** * Write value to custom firmware counter * Note: 0 <= counter_index < SBI_PMU_FW_CTR_MAX */ - void (*fw_counter_write_value)(uint32_t counter_index, + void (*fw_counter_write_value)(uint32_t hartid, uint32_t counter_index, uint64_t value); /** * Start custom firmware counter * Note: 0 <= counter_index < SBI_PMU_FW_CTR_MAX */ - int (*fw_counter_start)(uint32_t counter_index, + int (*fw_counter_start)(uint32_t hartid, uint32_t counter_index, uint64_t event_data); /** * Stop custom firmware counter * Note: 0 <= counter_index < SBI_PMU_FW_CTR_MAX */ - int (*fw_counter_stop)(uint32_t counter_index); + int (*fw_counter_stop)(uint32_t hartid, uint32_t counter_index); /** * Custom enable irq for hardware counter diff --git a/lib/sbi/sbi_pmu.c b/lib/sbi/sbi_pmu.c index 00a2c3e..74d6912 100644 --- a/lib/sbi/sbi_pmu.c +++ b/lib/sbi/sbi_pmu.c @@ -116,6 +116,7 @@ static int pmu_event_validate(unsigned long event_idx, uint64_t edata) uint32_t event_idx_code = get_cidx_code(event_idx); uint32_t event_idx_code_max = -1; uint32_t cache_ops_result, cache_ops_id, cache_id; + u32 hartid = current_hartid(); switch(event_idx_type) { case SBI_PMU_EVENT_TYPE_HW: @@ -129,7 +130,8 @@ static int pmu_event_validate(unsigned long event_idx, uint64_t edata) if (SBI_PMU_FW_PLATFORM == event_idx_code && pmu_dev && pmu_dev->fw_event_validate_encoding) - return pmu_dev->fw_event_validate_encoding(edata); + return pmu_dev->fw_event_validate_encoding(hartid, + edata); else event_idx_code_max = SBI_PMU_FW_MAX; break; @@ -199,7 +201,8 @@ int sbi_pmu_ctr_fw_read(uint32_t cidx, uint64_t *cval) if (SBI_PMU_FW_PLATFORM == event_code) { if (pmu_dev && pmu_dev->fw_counter_read_value) - *cval = pmu_dev->fw_counter_read_value(cidx - + *cval = pmu_dev->fw_counter_read_value(hartid, + cidx - num_hw_ctrs); else *cval = 0; @@ -391,10 +394,11 @@ static int pmu_ctr_start_fw(uint32_t cidx, uint32_t event_code, } if (ival_update) - pmu_dev->fw_counter_write_value(cidx - num_hw_ctrs, + pmu_dev->fw_counter_write_value(hartid, + cidx - num_hw_ctrs, ival); - return pmu_dev->fw_counter_start(cidx - num_hw_ctrs, + return pmu_dev->fw_counter_start(hartid, cidx - num_hw_ctrs, event_data); } else { if (ival_update) @@ -467,6 +471,7 @@ static int pmu_ctr_stop_hw(uint32_t cidx) static int pmu_ctr_stop_fw(uint32_t cidx, uint32_t event_code) { + u32 hartid = current_hartid(); int ret; if ((event_code >= SBI_PMU_FW_MAX && @@ -476,7 +481,7 @@ static int pmu_ctr_stop_fw(uint32_t cidx, uint32_t event_code) if (SBI_PMU_FW_PLATFORM == event_code && pmu_dev && pmu_dev->fw_counter_stop) { - ret = pmu_dev->fw_counter_stop(cidx - num_hw_ctrs); + ret = pmu_dev->fw_counter_stop(hartid, cidx - num_hw_ctrs); if (ret) return ret; } @@ -697,8 +702,9 @@ static int pmu_ctr_find_fw(unsigned long cbase, unsigned long cmask, continue; if (SBI_PMU_FW_PLATFORM == event_code && pmu_dev && pmu_dev->fw_counter_match_encoding) { - if (!pmu_dev->fw_counter_match_encoding(cidx - num_hw_ctrs, - edata)) + if (!pmu_dev->fw_counter_match_encoding(hartid, + cidx - num_hw_ctrs, + edata)) continue; } @@ -764,9 +770,8 @@ skip_match: if (flags & SBI_PMU_CFG_FLAG_AUTO_START) { if (SBI_PMU_FW_PLATFORM == event_code && pmu_dev && pmu_dev->fw_counter_start) { - ret = pmu_dev->fw_counter_start(ctr_idx - - num_hw_ctrs, - event_data); + ret = pmu_dev->fw_counter_start(hartid, + ctr_idx - num_hw_ctrs, event_data); if (ret) return ret; }