@@ -88,7 +88,9 @@ int aclint_mswi_cold_init(struct aclint_mswi_data *mswi)
region_size = ((mswi->size - pos) < ACLINT_MSWI_ALIGN) ?
(mswi->size - pos) : ACLINT_MSWI_ALIGN;
sbi_domain_memregion_init(mswi->addr + pos, region_size,
- SBI_DOMAIN_MEMREGION_MMIO, ®);
+ (SBI_DOMAIN_MEMREGION_MMIO |
+ SBI_DOMAIN_MEMREGION_M_READABLE |
+ SBI_DOMAIN_MEMREGION_M_WRITABLE), ®);
rc = sbi_domain_root_add_memregion(®);
if (rc)
return rc;
@@ -269,7 +269,9 @@ int aplic_cold_irqchip_init(struct aplic_data *aplic)
(last_deleg_irq == aplic->num_source) &&
(first_deleg_irq == 1))) {
sbi_domain_memregion_init(aplic->addr, aplic->size,
- SBI_DOMAIN_MEMREGION_MMIO, ®);
+ (SBI_DOMAIN_MEMREGION_MMIO |
+ SBI_DOMAIN_MEMREGION_M_READABLE |
+ SBI_DOMAIN_MEMREGION_M_WRITABLE), ®);
rc = sbi_domain_root_add_memregion(®);
if (rc)
return rc;
@@ -313,7 +313,9 @@ int imsic_cold_irqchip_init(struct imsic_data *imsic)
for (i = 0; i < IMSIC_MAX_REGS && imsic->regs[i].size; i++) {
sbi_domain_memregion_init(imsic->regs[i].addr,
imsic->regs[i].size,
- SBI_DOMAIN_MEMREGION_MMIO, ®);
+ (SBI_DOMAIN_MEMREGION_MMIO |
+ SBI_DOMAIN_MEMREGION_M_READABLE |
+ SBI_DOMAIN_MEMREGION_M_WRITABLE), ®);
rc = sbi_domain_root_add_memregion(®);
if (rc)
return rc;
@@ -188,26 +188,34 @@ int aclint_mtimer_cold_init(struct aclint_mtimer_data *mt,
rc = sbi_domain_root_add_memrange(mt->mtimecmp_addr,
mt->mtime_size + mt->mtimecmp_size,
MTIMER_REGION_ALIGN,
- SBI_DOMAIN_MEMREGION_MMIO);
+ (SBI_DOMAIN_MEMREGION_MMIO |
+ SBI_DOMAIN_MEMREGION_M_READABLE |
+ SBI_DOMAIN_MEMREGION_M_WRITABLE));
if (rc)
return rc;
} else if (mt->mtimecmp_addr == (mt->mtime_addr + mt->mtime_size)) {
rc = sbi_domain_root_add_memrange(mt->mtime_addr,
mt->mtime_size + mt->mtimecmp_size,
MTIMER_REGION_ALIGN,
- SBI_DOMAIN_MEMREGION_MMIO);
+ (SBI_DOMAIN_MEMREGION_MMIO |
+ SBI_DOMAIN_MEMREGION_M_READABLE |
+ SBI_DOMAIN_MEMREGION_M_WRITABLE));
if (rc)
return rc;
} else {
rc = sbi_domain_root_add_memrange(mt->mtime_addr,
mt->mtime_size, MTIMER_REGION_ALIGN,
- SBI_DOMAIN_MEMREGION_MMIO);
+ (SBI_DOMAIN_MEMREGION_MMIO |
+ SBI_DOMAIN_MEMREGION_M_READABLE |
+ SBI_DOMAIN_MEMREGION_M_WRITABLE));
if (rc)
return rc;
rc = sbi_domain_root_add_memrange(mt->mtimecmp_addr,
mt->mtimecmp_size, MTIMER_REGION_ALIGN,
- SBI_DOMAIN_MEMREGION_MMIO);
+ (SBI_DOMAIN_MEMREGION_MMIO |
+ SBI_DOMAIN_MEMREGION_M_READABLE |
+ SBI_DOMAIN_MEMREGION_M_WRITABLE));
if (rc)
return rc;
}