diff mbox series

[RFC,05/14] lib: sbi: Disable m/scounteren & enable mcountinhibit

Message ID 20210319221305.2138412-6-atish.patra@wdc.com
State Superseded
Headers show
Series SBI PMU extension support | expand

Commit Message

Atish Patra March 19, 2021, 10:12 p.m. UTC
Currently, all bits in mcountern are enabled unconditionally at
boot time. With SBI PMU extension, this should enabled only during
performance monitoring for a particular event except the TM bit. However,
this is done only if mcountinhibit is implemented because the supervisor
mode can not start/stop any event without mcountinhibit.

Similarly, supervisor should take care enabling scounteren which allows
U-mode to access pmu counters. Disable all bits in scounteren in M-mode.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
---
 lib/sbi/sbi_hart.c | 22 ++++++++++++++++++----
 1 file changed, 18 insertions(+), 4 deletions(-)

Comments

Anup Patel April 8, 2021, 3:24 a.m. UTC | #1
> -----Original Message-----
> From: Atish Patra <atish.patra@wdc.com>
> Sent: 20 March 2021 03:43
> To: opensbi@lists.infradead.org
> Cc: Atish Patra <Atish.Patra@wdc.com>; Anup Patel <Anup.Patel@wdc.com>
> Subject: [RFC 05/14] lib: sbi: Disable m/scounteren & enable mcountinhibit
> 
> Currently, all bits in mcountern are enabled unconditionally at boot time.
> With SBI PMU extension, this should enabled only during performance
> monitoring for a particular event except the TM bit. However, this is done
> only if mcountinhibit is implemented because the supervisor mode can not
> start/stop any event without mcountinhibit.
> 
> Similarly, supervisor should take care enabling scounteren which allows U-
> mode to access pmu counters. Disable all bits in scounteren in M-mode.
> 
> Signed-off-by: Atish Patra <atish.patra@wdc.com>

Looks good to me.

Reviewed-by: Anup Patel <anup.patel@wdc.com>

Regards,
Anup

> ---
>  lib/sbi/sbi_hart.c | 22 ++++++++++++++++++----
>  1 file changed, 18 insertions(+), 4 deletions(-)
> 
> diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c index
> 006ec830d86c..b87d1dbedc0b 100644
> --- a/lib/sbi/sbi_hart.c
> +++ b/lib/sbi/sbi_hart.c
> @@ -51,12 +51,26 @@ static void mstatus_init(struct sbi_scratch *scratch)
> 
>  	csr_write(CSR_MSTATUS, mstatus_val);
> 
> -	/* Enable user/supervisor use of perf counters */
> +	/* Disable user mode usage of perf counters */
>  	if (misa_extension('S') &&
>  	    sbi_hart_has_feature(scratch, SBI_HART_HAS_SCOUNTEREN))
> -		csr_write(CSR_SCOUNTEREN, -1);
> -	if (sbi_hart_has_feature(scratch, SBI_HART_HAS_MCOUNTEREN))
> -		csr_write(CSR_MCOUNTEREN, -1);
> +		csr_write(CSR_SCOUNTEREN, 0);
> +
> +	if (sbi_hart_has_feature(scratch, SBI_HART_HAS_MCOUNTEREN)) {
> +		if (sbi_hart_has_feature(scratch,
> SBI_HART_HAS_MCOUNTINHIBIT))
> +			/**
> +			 * Just enable TM bit now. All other counters will be
> +			 * enabled at runtime after S-mode request
> +			 */
> +			csr_write(CSR_MCOUNTEREN, 2);
> +		else
> +			/* Supervisor mode usage are enabled by default */
> +			csr_write(CSR_MCOUNTEREN, -1);
> +	}
> +
> +	/* Counters will start running at runtime after S-mode request */
> +	if (sbi_hart_has_feature(scratch, SBI_HART_HAS_MCOUNTINHIBIT))
> +		csr_write(CSR_MCOUNTINHIBIT, -1);
> 
>  	/* Disable all interrupts */
>  	csr_write(CSR_MIE, 0);
> --
> 2.25.1
diff mbox series

Patch

diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index 006ec830d86c..b87d1dbedc0b 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -51,12 +51,26 @@  static void mstatus_init(struct sbi_scratch *scratch)
 
 	csr_write(CSR_MSTATUS, mstatus_val);
 
-	/* Enable user/supervisor use of perf counters */
+	/* Disable user mode usage of perf counters */
 	if (misa_extension('S') &&
 	    sbi_hart_has_feature(scratch, SBI_HART_HAS_SCOUNTEREN))
-		csr_write(CSR_SCOUNTEREN, -1);
-	if (sbi_hart_has_feature(scratch, SBI_HART_HAS_MCOUNTEREN))
-		csr_write(CSR_MCOUNTEREN, -1);
+		csr_write(CSR_SCOUNTEREN, 0);
+
+	if (sbi_hart_has_feature(scratch, SBI_HART_HAS_MCOUNTEREN)) {
+		if (sbi_hart_has_feature(scratch, SBI_HART_HAS_MCOUNTINHIBIT))
+			/**
+			 * Just enable TM bit now. All other counters will be
+			 * enabled at runtime after S-mode request
+			 */
+			csr_write(CSR_MCOUNTEREN, 2);
+		else
+			/* Supervisor mode usage are enabled by default */
+			csr_write(CSR_MCOUNTEREN, -1);
+	}
+
+	/* Counters will start running at runtime after S-mode request */
+	if (sbi_hart_has_feature(scratch, SBI_HART_HAS_MCOUNTINHIBIT))
+		csr_write(CSR_MCOUNTINHIBIT, -1);
 
 	/* Disable all interrupts */
 	csr_write(CSR_MIE, 0);