Message ID | 20240918-dts-aspeed-system1-peci-snoop-v2-1-2d4d17403670@gmail.com |
---|---|
State | New |
Headers | show |
Series | [v2] ARM: dts: aspeed: Enable PECI and LPC snoop for IBM System1 | expand |
On Wed, 18 Sep 2024 14:50:03 +0530, Manojkiran Eda wrote: > This patch enables the PECI interface and configures the LPC Snoop for > ports 0x80 and 0x81 in the ASPEED BMC for IBM System1. > > Thanks, I've applied this to be picked up through the BMC tree. [1/1] ARM: dts: aspeed: Enable PECI and LPC snoop for IBM System1 commit: abfafb7269c3c1d73a2a7136f9d3f7e417c83a4c -- Andrew Jeffery <andrew@codeconstruct.com.au>
diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-system1.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-system1.dts index cb3063413d1f..738a86c787c0 100644 --- a/arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-system1.dts +++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-system1.dts @@ -464,6 +464,15 @@ &kcs3 { aspeed,lpc-interrupts = <11 IRQ_TYPE_LEVEL_LOW>; }; +&peci0 { + status = "okay"; +}; + +&lpc_snoop { + status = "okay"; + snoop-ports = <0x80>, <0x81>; +}; + &i2c0 { status = "okay";