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[61.220.246.151]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-1faac97a122sm5403235ad.176.2024.06.26.23.32.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 26 Jun 2024 23:32:13 -0700 (PDT) From: Yang Chen To: openbmc@lists.ozlabs.org, andrew@codeconstruct.com.au, patrick@stwcx.xyz, joel@jms.id.au Subject: [PATCH linux dev-6.6 09/17] ARM: dts: aspeed: minerva: add linename of two pins Date: Thu, 27 Jun 2024 14:29:43 +0800 Message-Id: <20240627062951.936256-10-yangchen.openbmc@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240627062951.936256-1-yangchen.openbmc@gmail.com> References: <20240627062951.936256-1-yangchen.openbmc@gmail.com> MIME-Version: 1.0 X-Mailman-Approved-At: Fri, 28 Jun 2024 09:03:24 +1000 X-BeenThere: openbmc@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Development list for OpenBMC List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Jerry.Lin@quantatw.com, yang.chen@quantatw.com Errors-To: openbmc-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "openbmc" From: Yang Chen Add linename of two pins for power good/control. Signed-off-by: Yang Chen --- arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-minerva.dts | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-minerva.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-minerva.dts index 86d319d7edcd..f41dcb36243a 100644 --- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-minerva.dts +++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-minerva.dts @@ -557,12 +557,12 @@ &gpio0 { /*N0-N7*/ "","","","","","","","", /*O0-O7*/ "","","","","","","","", /*P0-P7*/ "","","","","","","","", - /*Q0-Q7*/ "","","","","","","","", + /*Q0-Q7*/ "","","","","","power-chassis-control","","", /*R0-R7*/ "","","","","","","","", /*S0-S7*/ "","","","","","","","", /*T0-T7*/ "","","","","","","","", /*U0-U7*/ "","","","","","","","", - /*V0-V7*/ "","","","","BAT_DETECT","","","", + /*V0-V7*/ "","","","","BAT_DETECT","","power-chassis-good","", /*W0-W7*/ "","","","","","","","", /*X0-X7*/ "","","BLADE_UART_SEL3","","","","","", /*Y0-Y7*/ "","","","","","","","",