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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Maxime Coquelin Subject: [PATCH net-next 13/16] net: stmmac: intel: Register generic MDIO device Date: Tue, 5 Dec 2023 13:35:34 +0300 Message-ID: <20231205103559.9605-14-fancer.lancer@gmail.com> X-Mailer: git-send-email 2.42.1 In-Reply-To: <20231205103559.9605-1-fancer.lancer@gmail.com> References: <20231205103559.9605-1-fancer.lancer@gmail.com> MIME-Version: 1.0 X-BeenThere: openbmc@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Development list for OpenBMC List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, netdev@vger.kernel.org, openbmc@lists.ozlabs.org, linux-kernel@vger.kernel.org, Serge Semin , linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org Errors-To: openbmc-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "openbmc" The DW XPCS driver has been updated to being bindable with the respective MDIO device registered during the MDIO bus probe procedure. As an example of using that feature let's convert the Intel mGBE low-level driver to registering the MDIO-device board info. Thus the registered DW XPCS device will be a subject of the fine-tunings performed during the MDIO-device probe procedures. Signed-off-by: Serge Semin --- .../net/ethernet/stmicro/stmmac/dwmac-intel.c | 31 ++++++++++++++++++- 1 file changed, 30 insertions(+), 1 deletion(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c index 60283543ffc8..7642c11abc59 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c @@ -4,6 +4,7 @@ #include #include +#include #include #include "dwmac-intel.h" #include "dwmac4.h" @@ -585,6 +586,28 @@ static int intel_mgbe_common_data(struct pci_dev *pdev, /* Intel mgbe SGMII interface uses pcs-xcps */ if (plat->phy_interface == PHY_INTERFACE_MODE_SGMII || plat->phy_interface == PHY_INTERFACE_MODE_1000BASEX) { + struct mdio_board_info *xpcs_info; + + xpcs_info = devm_kzalloc(&pdev->dev, + sizeof(*xpcs_info) + MII_BUS_ID_SIZE, + GFP_KERNEL); + if (!xpcs_info) { + ret = -ENOMEM; + goto err_alloc_info; + } + + xpcs_info->bus_id = (void *)xpcs_info + sizeof(*xpcs_info); + snprintf((char *)xpcs_info->bus_id, MII_BUS_ID_SIZE, + "stmmac-%x", plat->bus_id); + + snprintf(xpcs_info->modalias, MDIO_NAME_SIZE, "dwxpcs"); + + xpcs_info->mdio_addr = INTEL_MGBE_XPCS_ADDR; + + ret = mdiobus_register_board_info(xpcs_info, 1); + if (ret) + goto err_alloc_info; + plat->mdio_bus_data->has_xpcs = true; plat->mdio_bus_data->xpcs_an_inband = true; } @@ -600,7 +623,7 @@ static int intel_mgbe_common_data(struct pci_dev *pdev, fwnode_handle_put(fixed_node); } - /* Ensure mdio bus scan skips intel serdes and pcs-xpcs */ + /* Ensure mdio bus PHY-scan skips intel serdes and pcs-xpcs */ plat->mdio_bus_data->phy_mask = 1 << INTEL_MGBE_ADHOC_ADDR; plat->mdio_bus_data->phy_mask |= 1 << INTEL_MGBE_XPCS_ADDR; @@ -618,6 +641,12 @@ static int intel_mgbe_common_data(struct pci_dev *pdev, plat->msi_tx_base_vec = 1; return 0; + +err_alloc_info: + clk_disable_unprepare(clk); + clk_unregister_fixed_rate(clk); + + return ret; } static int ehl_common_data(struct pci_dev *pdev,