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Sat, 23 Apr 2022 04:32:32 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gmx.net; s=badeba3b8450; t=1650652318; bh=6YuxGgl4dOw9oAtmXhuC816ahBzK2oYrigEc+RKljBI=; h=X-UI-Sender-Class:From:To:Cc:Subject:Date:In-Reply-To:References; b=Go7zofTF6VMJRn7qW+oJommJYwhjfFcXJzv5LakxOCslLGDutZ6HaggT8fztUwkXn qAjfRNfUQqiAY/quf7Zvm4kHmvmolRVq211U4H14tfh88R4GzupuLV13PIZUinAkVY S1HeXSRtjgLKj1YKMKrkgRU8o8EoBt/U0Y2KsV2w= X-UI-Sender-Class: 01bb95c1-4bf8-414a-932a-4f6e2808ef9c Received: from longitude ([87.78.190.74]) by mail.gmx.net (mrgmx105 [212.227.17.168]) with ESMTPSA (Nemesis) id 1N7iCg-1nuMSS1S6M-014olk; Fri, 22 Apr 2022 20:31:58 +0200 From: =?utf-8?q?Jonathan_Neusch=C3=A4fer?= To: linux-clk@vger.kernel.org, openbmc@lists.ozlabs.org Subject: [PATCH 7/7] ARM: dts: wpcm450: Switch clocks to clock controller Date: Fri, 22 Apr 2022 20:30:12 +0200 Message-Id: <20220422183012.444674-8-j.neuschaefer@gmx.net> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220422183012.444674-1-j.neuschaefer@gmx.net> References: <20220422183012.444674-1-j.neuschaefer@gmx.net> MIME-Version: 1.0 X-Provags-ID: V03:K1:I67tF9Nlj04Phq6/V+ryuFf0Cliytuu3Zmf4FI2sPERSmiXM3XH R2sSgG7ktBlSjy9OdFQrd6Ec/8zwv1ZLrWy6vGPGRzJYTJArz+9bFEhqtpLtcF+CTwEUHq6 BpWfwBxU2AxUAF5JBamEAauV775wUODEbE6nCW1yOWZPbsvznU4uZmjcPzjJRpLIujUNFFB ooGmDpfMZ9LxJkCORbk5A== X-Spam-Flag: NO X-UI-Out-Filterresults: notjunk:1;V03:K0:8c54XHSt3ac=:psA86FAB40KotvKaXr6W0Y wCL17K1pimNjF5dquW7DU2tt03i/m3ex/mnWKTxeiSFqDogjnxeTMf4lJPtoaqdxBTMdbZYBY tZPZg7l/jzHhniSnCujCZ7XhdrjubncnSzGdwVXtUJjG8hVrUTWpddtPPR0en0a+OCUWgH/ML QKeKyN1CNH4O4VzpQEKoMeMb6U2XfD4NiaZ93AZrNR3YxhMD76AVY3jxOLFyuCk1vDulLgBY8 1jklPSJNj/ZSea39mdgMU5e0WTc8CqmMTT3ICyYtU6PK7lmin3JvkjKJ3hnwhJmOrLq6WNt6w giYfzIUKUQDmdKF9S7vMpDHnd8DASR+SKtF/zGGeKxhpwHYosp7tVV6iClUjTG4IAXAhPd2dP pmV+V/cV00ha/fZ1/HEcwvXRChok8HNMV+epsnlIbw9lZWj32QMcpwQoKnEzG5QbxY6QIOnUr pFlB1FaNGcS9PyetgcLTrrLOAWWeireG035G/kW3KHnQR0an9wG9lpiISQKMhP1GqqIYpFBGt e61jm4+TIGFftMf5UwMjLyK/Sjw/GRP7dPTKUztWVKGgQ5Pi491C5kxhPyNVl9UwKuZqrAvJu /TR2//if06otGpwJpfhWnENL62+CwuWmvJDxwyqZW7NtDpcVm1XXRdM0tZykAAkCKDbfIRvtl ffDN8JUztcs4bqnNGZHXVo1uk6S6oiE9NFe7hzB3K5gkcSz61zgNQnysD2sMocZ7Oqbf8C+Fc NDFcwh/McjhFmZ9fqjus4YGICtiXGHVx2vVXBaI2CBMpDGHgokMXwHHrqLblp5q4xF0Ae7MIf hImxk3BsuZGViYNlrB2++iHEkxLBkzrAun3DSk9QnWq15ZmUAnJpxmGneAzYpoTFrgfXRgtlt 8SW33KDhlympKpRNygP7UMX/P10W209j0GBZaBWeH5mtam55RcwRtY6QEFIKsbrTrghKOMuFx 0lRYRimBM2TUIeLEz3ebCb+X7B/FRO7jN0Gv3I8DdVecSUzKqeDpVGIZzfwYv1jY6mYYdDwx5 Ws1eFN1cHtt3A5/rn8y/FmibRGGzMAPz1asfL5N7Ujl7gCDDXR4Zh5TchoK2Og2Y7GYfLTIfn Etbdy8JIwXiS/c= X-BeenThere: openbmc@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Development list for OpenBMC List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Wim Van Sebroeck , linux-watchdog@vger.kernel.org, Stephen Boyd , Patrick Venture , Michael Turquette , Daniel Lezcano , linux-kernel@vger.kernel.org, =?utf-8?q?Jonathan_Neusch=C3=A4fer?= , Avi Fishman , Rob Herring , Benjamin Fair , Philipp Zabel , Krzysztof Kozlowski , Tali Perry , Thomas Gleixner , Guenter Roeck , Tomer Maimon Errors-To: openbmc-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "openbmc" This change is incompatible with older kernels because it requires the clock controller driver, but I think that's acceptable because WPCM450 support is generally still in an early phase. Signed-off-by: Jonathan Neuschäfer --- arch/arm/boot/dts/nuvoton-wpcm450.dtsi | 20 +++++++++----------- 1 file changed, 9 insertions(+), 11 deletions(-) -- 2.35.1 diff --git a/arch/arm/boot/dts/nuvoton-wpcm450.dtsi b/arch/arm/boot/dts/nuvoton-wpcm450.dtsi index 62d70fda7b520..f868bd7db009a 100644 --- a/arch/arm/boot/dts/nuvoton-wpcm450.dtsi +++ b/arch/arm/boot/dts/nuvoton-wpcm450.dtsi @@ -2,6 +2,7 @@ // Copyright 2021 Jonathan Neuschäfer #include +#include / { compatible = "nuvoton,wpcm450"; @@ -32,13 +33,6 @@ cpu@0 { }; }; - clk24m: clock-24mhz { - /* 24 MHz dummy clock */ - compatible = "fixed-clock"; - clock-frequency = <24000000>; - #clock-cells = <0>; - }; - refclk: clock-48mhz { /* 48 MHz reference oscillator */ compatible = "fixed-clock"; @@ -73,7 +67,7 @@ serial0: serial@b8000000 { reg = <0xb8000000 0x20>; reg-shift = <2>; interrupts = <7 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clk24m>; + clocks = <&clk WPCM450_CLK_UART0>; pinctrl-names = "default"; pinctrl-0 = <&bsp_pins>; status = "disabled"; @@ -84,7 +78,7 @@ serial1: serial@b8000100 { reg = <0xb8000100 0x20>; reg-shift = <2>; interrupts = <8 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clk24m>; + clocks = <&clk WPCM450_CLK_UART1>; status = "disabled"; }; @@ -92,14 +86,18 @@ timer0: timer@b8001000 { compatible = "nuvoton,wpcm450-timer"; interrupts = <12 IRQ_TYPE_LEVEL_HIGH>; reg = <0xb8001000 0x1c>; - clocks = <&clk24m>; + clocks = <&clk WPCM450_CLK_TIMER0>, + <&clk WPCM450_CLK_TIMER1>, + <&clk WPCM450_CLK_TIMER2>, + <&clk WPCM450_CLK_TIMER3>, + <&clk WPCM450_CLK_TIMER4>; }; watchdog0: watchdog@b800101c { compatible = "nuvoton,wpcm450-wdt"; interrupts = <1 IRQ_TYPE_LEVEL_HIGH>; reg = <0xb800101c 0x4>; - clocks = <&clk24m>; + clocks = <&clk WPCM450_CLK_WDT>; }; aic: interrupt-controller@b8002000 {