From patchwork Wed Feb 2 14:48:27 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Winiarska, Iwona" X-Patchwork-Id: 1587650 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.a=rsa-sha256 header.s=Intel header.b=Js/RvHvl; dkim-atps=neutral Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.ozlabs.org (client-ip=112.213.38.117; helo=lists.ozlabs.org; envelope-from=openbmc-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org; receiver=) Received: from lists.ozlabs.org (lists.ozlabs.org [112.213.38.117]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4JplD041c0z9sFh for ; Thu, 3 Feb 2022 01:53:20 +1100 (AEDT) Received: from boromir.ozlabs.org (localhost [IPv6:::1]) by lists.ozlabs.org (Postfix) with ESMTP id 4JplD01np6z3bXg for ; Thu, 3 Feb 2022 01:53:20 +1100 (AEDT) Authentication-Results: lists.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.a=rsa-sha256 header.s=Intel header.b=Js/RvHvl; dkim-atps=neutral X-Original-To: openbmc@lists.ozlabs.org Delivered-To: openbmc@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=intel.com (client-ip=134.134.136.126; helo=mga18.intel.com; envelope-from=iwona.winiarska@intel.com; receiver=) Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.a=rsa-sha256 header.s=Intel header.b=Js/RvHvl; dkim-atps=neutral Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 4Jpl9y19WNz3bV4; Thu, 3 Feb 2022 01:51:33 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1643813494; x=1675349494; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=qSAzalWburnwFux0BpRZHgg+Y+rx8hWq9RbpE+mk5Xs=; b=Js/RvHvlFkGP8opwdalfMN2kLsbgGGvydlDX0hTJONmD1CdfPYx6gtGx /XGf1uQhqiVpI5v8SzgYbh+MUTWPVbks80OQTmvPw0GIqGBLsY289L/br 9N1xAAnALGqaKZ7YYu6OQw9M4rTJYI+eU0AGn5Ihf1H++E590P10pLsZZ /lThKemNMyJsqWtOAf2a/xgDqWcNFg7v8bsq8x0TclJwdVIA2/cCn96Qe cUdRr+35Iauke4GNp5vK1C8PFk9FtBeWELtGr0gNX329jmerg43xpAJ9w NurIB0oxBRN+haKv1InyC7wz7g17ERQTWxERUI8AwU9PwifcSY12fuKoL Q==; X-IronPort-AV: E=McAfee;i="6200,9189,10245"; a="231498129" X-IronPort-AV: E=Sophos;i="5.88,337,1635231600"; d="scan'208";a="231498129" Received: from orsmga002.jf.intel.com ([10.7.209.21]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Feb 2022 06:50:31 -0800 X-IronPort-AV: E=Sophos;i="5.88,337,1635231600"; d="scan'208";a="497763029" Received: from mwnuczyn-mobl.ger.corp.intel.com (HELO localhost) ([10.249.137.160]) by orsmga002-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Feb 2022 06:50:19 -0800 From: Iwona Winiarska To: linux-kernel@vger.kernel.org, openbmc@lists.ozlabs.org, Greg Kroah-Hartman Subject: [PATCH v7 02/13] dt-bindings: Add bindings for peci-aspeed Date: Wed, 2 Feb 2022 15:48:27 +0100 Message-Id: <20220202144838.163875-3-iwona.winiarska@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220202144838.163875-1-iwona.winiarska@intel.com> References: <20220202144838.163875-1-iwona.winiarska@intel.com> MIME-Version: 1.0 X-BeenThere: openbmc@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Development list for OpenBMC List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-aspeed@lists.ozlabs.org, linux-doc@vger.kernel.org, Dave Hansen , Zev Weiss , Jae Hyun Yoo , Jonathan Corbet , Pierre-Louis Bossart , Guenter Roeck , devicetree@vger.kernel.org, Jean Delvare , Arnd Bergmann , Billy Tsai , Rob Herring , Borislav Petkov , Iwona Winiarska , Dan Williams , Andy Shevchenko , linux-arm-kernel@lists.infradead.org, linux-hwmon@vger.kernel.org, Tony Luck , Andrew Jeffery , Randy Dunlap , Olof Johansson Errors-To: openbmc-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "openbmc" Add device tree bindings for the peci-aspeed controller driver. Co-developed-by: Jae Hyun Yoo Signed-off-by: Jae Hyun Yoo Signed-off-by: Iwona Winiarska Reviewed-by: Joel Stanley Reviewed-by: Rob Herring --- .../devicetree/bindings/peci/peci-aspeed.yaml | 72 +++++++++++++++++++ 1 file changed, 72 insertions(+) create mode 100644 Documentation/devicetree/bindings/peci/peci-aspeed.yaml diff --git a/Documentation/devicetree/bindings/peci/peci-aspeed.yaml b/Documentation/devicetree/bindings/peci/peci-aspeed.yaml new file mode 100644 index 000000000000..1e68a801a92a --- /dev/null +++ b/Documentation/devicetree/bindings/peci/peci-aspeed.yaml @@ -0,0 +1,72 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/peci/peci-aspeed.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Aspeed PECI Bus Device Tree Bindings + +maintainers: + - Iwona Winiarska + - Jae Hyun Yoo + +allOf: + - $ref: peci-controller.yaml# + +properties: + compatible: + enum: + - aspeed,ast2400-peci + - aspeed,ast2500-peci + - aspeed,ast2600-peci + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + description: + Clock source for PECI controller. Should reference the external + oscillator clock. + maxItems: 1 + + resets: + maxItems: 1 + + cmd-timeout-ms: + minimum: 1 + maximum: 1000 + default: 1000 + + clock-frequency: + description: + The desired operation frequency of PECI controller in Hz. + minimum: 2000 + maximum: 2000000 + default: 1000000 + +required: + - compatible + - reg + - interrupts + - clocks + - resets + +additionalProperties: false + +examples: + - | + #include + #include + peci-controller@1e78b000 { + compatible = "aspeed,ast2600-peci"; + reg = <0x1e78b000 0x100>; + interrupts = ; + clocks = <&syscon ASPEED_CLK_GATE_REF0CLK>; + resets = <&syscon ASPEED_RESET_PECI>; + cmd-timeout-ms = <1000>; + clock-frequency = <1000000>; + }; +...