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Fri, 10 Sep 2021 19:54:20 +0000 (GMT) Received: from b03ledav001.gho.boulder.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 55F266E052; Fri, 10 Sep 2021 19:54:20 +0000 (GMT) Received: from fstone01p1.aus.stglabs.ibm.com (unknown [9.3.116.196]) by b03ledav001.gho.boulder.ibm.com (Postfix) with ESMTP; Fri, 10 Sep 2021 19:54:20 +0000 (GMT) From: Adriana Kobylak To: joel@jms.id.au, linux-arm-kernel@lists.infradead.org, linux-aspeed@lists.ozlabs.org Subject: [PATCH v2] ARM: dts: aspeed: rainier: Add N_MODE_VREF gpio Date: Fri, 10 Sep 2021 19:54:17 +0000 Message-Id: <20210910195417.2838841-1-anoo@linux.ibm.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-GUID: kvZMz66oaRi9U5CcGODnl8u1OycCKS2B X-Proofpoint-ORIG-GUID: ZnPfP3ip2j1sZJG9L6_zv4t4URZ-xLFS X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.391, 18.0.790 definitions=2021-09-10_07:2021-09-09, 2021-09-10 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 impostorscore=0 malwarescore=0 spamscore=0 mlxscore=0 phishscore=0 suspectscore=0 clxscore=1015 bulkscore=0 adultscore=0 lowpriorityscore=0 mlxlogscore=975 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2109030001 definitions=main-2109100112 X-BeenThere: openbmc@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Development list for OpenBMC List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: spinler@us.ibm.com, derekh@us.ibm.com, openbmc@lists.ozlabs.org, Adriana Kobylak , bjwyman@gmail.com, shawnmm@us.ibm.com Errors-To: openbmc-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "openbmc" From: Adriana Kobylak The N_MODE_VREF gpio is designed to be used to specify how many power supplies the system should have (2 or 4). If enough power supplies fail so that the system no longer has redundancy (no longer n+1), the hardware will signal to the Onboard Chip Controller that the system may be oversubscribed, and performance may need to be reduced so the system can maintain it's powered on state. This gpio is on a 9552, populate all the gpios on that chip for completeness. Signed-off-by: Adriana Kobylak --- v2: Update commit message. arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts | 103 +++++++++++++++++++ 1 file changed, 103 insertions(+) diff --git a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts index 6fd3ddf97a21..d5eea86dc260 100644 --- a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts +++ b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts @@ -1502,6 +1502,109 @@ eeprom@51 { reg = <0x51>; }; + pca_pres3: pca9552@60 { + compatible = "nxp,pca9552"; + reg = <0x60>; + #address-cells = <1>; + #size-cells = <0>; + gpio-controller; + #gpio-cells = <2>; + + gpio-line-names = + "", + "APSS_RESET_N", + "", "", "", "", + "P10_DCM0_PRES", + "P10_DCM1_PRES", + "", "", + "N_MODE_CPU_N", + "", + "PRESENT_VRM_DCM0_N", + "PRESENT_VRM_DCM1_N", + "N_MODE_VREF", + ""; + + gpio@0 { + reg = <0>; + type = ; + }; + + gpio@1 { + reg = <1>; + type = ; + }; + + gpio@2 { + reg = <2>; + type = ; + }; + + gpio@3 { + reg = <3>; + type = ; + }; + + gpio@4 { + reg = <4>; + type = ; + }; + + gpio@5 { + reg = <5>; + type = ; + }; + + gpio@6 { + reg = <6>; + type = ; + }; + + gpio@7 { + reg = <7>; + type = ; + }; + + gpio@8 { + reg = <8>; + type = ; + }; + + gpio@9 { + reg = <9>; + type = ; + }; + + gpio@10 { + reg = <10>; + type = ; + }; + + gpio@11 { + reg = <11>; + type = ; + }; + + gpio@12 { + reg = <12>; + type = ; + }; + + gpio@13 { + reg = <13>; + type = ; + }; + + gpio@14 { + reg = <14>; + type = ; + }; + + gpio@15 { + reg = <15>; + type = ; + }; + }; + pca_pres2: pca9552@61 { compatible = "nxp,pca9552"; reg = <0x61>;