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Thu, 24 Jun 2021 03:31:37 -0400 (EDT) From: Andrew Jeffery To: joel@jms.id.au Subject: [PATCH linux dev-5.10] ARM: dts: aspeed: rainier: Add eMMC clock phase compensation Date: Thu, 24 Jun 2021 17:01:29 +0930 Message-Id: <20210624073129.802108-1-andrew@aj.id.au> X-Mailer: git-send-email 2.30.2 MIME-Version: 1.0 X-BeenThere: openbmc@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Development list for OpenBMC List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: openbmc@lists.ozlabs.org Errors-To: openbmc-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "openbmc" Determined by scope measurements at speed. Signed-off-by: Andrew Jeffery Reviewed-by: Joel Stanley Link: https://lore.kernel.org/r/20201208012615.2717412-7-andrew@aj.id.au Signed-off-by: Joel Stanley (cherry picked from commit d2dc55b96f876616838b61b2378656effd0e14ba) --- We missed this when backporting the eMMC phase series arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts index 73e94be5424b..1491c62e5b76 100644 --- a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts +++ b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts @@ -310,6 +310,7 @@ &pinctrl_emmc_default { &emmc { status = "okay"; + clk-phase-mmc-hs200 = <180>, <180>; }; &fsim0 {