diff mbox series

board: ast2400: Enable SGPIO in SCU

Message ID 20210413161150.2815450-1-wltu@google.com
State New
Headers show
Series board: ast2400: Enable SGPIO in SCU | expand

Commit Message

Willy Tu April 13, 2021, 4:11 p.m. UTC
Add option to enable register for SGPIO in SCU.

Included new function register values for ast2400
SCU and enable the SGPIO function in board init.

Signed-off-by: Willy Tu <wltu@google.com>
---
 arch/arm/include/asm/arch-aspeed/scu_ast2400.h |  4 ++++
 arch/arm/mach-aspeed/ast2400/Kconfig           |  4 ++++
 arch/arm/mach-aspeed/ast2400/board_common.c    | 15 +++++++++++++++
 3 files changed, 23 insertions(+)

Comments

Joel Stanley April 13, 2021, 11:32 p.m. UTC | #1
Hi Willy,

On Tue, 13 Apr 2021 at 16:11, Willy Tu <wltu@google.com> wrote:
>
> Add option to enable register for SGPIO in SCU.
>
> Included new function register values for ast2400
> SCU and enable the SGPIO function in board init.

Which branch would you like this patch applied to?

>
> Signed-off-by: Willy Tu <wltu@google.com>
> ---
>  arch/arm/include/asm/arch-aspeed/scu_ast2400.h |  4 ++++
>  arch/arm/mach-aspeed/ast2400/Kconfig           |  4 ++++
>  arch/arm/mach-aspeed/ast2400/board_common.c    | 15 +++++++++++++++
>  3 files changed, 23 insertions(+)
>
> diff --git a/arch/arm/include/asm/arch-aspeed/scu_ast2400.h b/arch/arm/include/asm/arch-aspeed/scu_ast2400.h
> index 9c5d96ae84..17eaaf3e9d 100644
> --- a/arch/arm/include/asm/arch-aspeed/scu_ast2400.h
> +++ b/arch/arm/include/asm/arch-aspeed/scu_ast2400.h
> @@ -75,6 +75,10 @@
>  #define SCU_PIN_FUN_SCL2               (1 << 14)
>  #define SCU_PIN_FUN_SDA1               (1 << 13)
>  #define SCU_PIN_FUN_SDA2               (1 << 15)
> +#define SCU_PIN_FUN_SGPMCK             (0x1 << 8)
> +#define SCU_PIN_FUN_SGPMLD             (0x1 << 9)
> +#define SCU_PIN_FUN_SGPMO              (0x1 << 10)
> +#define SCU_PIN_FUN_SGPMI              (0x1 << 11)
>
>  #define SCU_D2PLL_EXT1_OFF             (1 << 0)
>  #define SCU_D2PLL_EXT1_BYPASS          (1 << 1)
> diff --git a/arch/arm/mach-aspeed/ast2400/Kconfig b/arch/arm/mach-aspeed/ast2400/Kconfig
> index f76276860c..c4e88b5140 100644
> --- a/arch/arm/mach-aspeed/ast2400/Kconfig
> +++ b/arch/arm/mach-aspeed/ast2400/Kconfig
> @@ -17,6 +17,10 @@ config TARGET_EVB_AST2400
>           20 pin JTAG, pinouts for 14 I2Cs, 3 SPIs and eSPI, 8 PWMs.
>  endchoice
>
> +config ENABLE_SGPIO
> +    tristate "Enable SGPIO in SCU"
> +       default n
> +
>  source "board/aspeed/evb_ast2400/Kconfig"
>
>  endif
> diff --git a/arch/arm/mach-aspeed/ast2400/board_common.c b/arch/arm/mach-aspeed/ast2400/board_common.c
> index 3829b06934..eca2ef03e5 100644
> --- a/arch/arm/mach-aspeed/ast2400/board_common.c
> +++ b/arch/arm/mach-aspeed/ast2400/board_common.c
> @@ -14,6 +14,21 @@ __weak int board_init(void)
>  {
>         gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
>
> +#ifdef CONFIG_ENABLE_SGPIO
> +#define SCU_BASE 0x1e6e2000
> +#define SCU_FUN_PIN_CTRL2 0x84 /* Multi-function Pin Control#2*/
> +       /* Unlock SCU */
> +       writel(SCU_UNLOCK_VALUE, SCU_BASE);
> +
> +       /* Enable SGPIO Master */
> +       u32 reg = readl(SCU_BASE + SCU_FUN_PIN_CTRL2);
> +
> +       reg |= (SCU_PIN_FUN_SGPMI  |
> +                       SCU_PIN_FUN_SGPMO  |
> +                       SCU_PIN_FUN_SGPMLD |
> +                       SCU_PIN_FUN_SGPMCK);
> +       writel(reg, SCU_BASE + SCU_FUN_PIN_CTRL2);
> +#endif
>         return 0;
>  }
>
> --
> 2.31.1.295.g9ea45b61b8-goog
>
Willy Tu April 14, 2021, 12:06 a.m. UTC | #2
Hi Joel,

thanks for the response.

Sorry, I did not update the patch to include the branch name. I'll be more
careful next time.

This change should be in `v2019.04-aspeed-openbmc` and the other patch in
https://lore.kernel.org/openbmc/20210413161238.2816187-1-wltu@google.com/
should
be in `v2016.07-aspeed-openbmc`.

I have not tested this change, but have tested
https://lore.kernel.org/openbmc/20210413161238.2816187-1-wltu@google.com/ that
I based off of (Which I have tested with my setup). Will that be an issue?

Best,

Willy Tu

On Tue, Apr 13, 2021 at 4:32 PM Joel Stanley <joel@jms.id.au> wrote:

> Hi Willy,
>
> On Tue, 13 Apr 2021 at 16:11, Willy Tu <wltu@google.com> wrote:
> >
> > Add option to enable register for SGPIO in SCU.
> >
> > Included new function register values for ast2400
> > SCU and enable the SGPIO function in board init.
>
> Which branch would you like this patch applied to?
>
> >
> > Signed-off-by: Willy Tu <wltu@google.com>
> > ---
> >  arch/arm/include/asm/arch-aspeed/scu_ast2400.h |  4 ++++
> >  arch/arm/mach-aspeed/ast2400/Kconfig           |  4 ++++
> >  arch/arm/mach-aspeed/ast2400/board_common.c    | 15 +++++++++++++++
> >  3 files changed, 23 insertions(+)
> >
> > diff --git a/arch/arm/include/asm/arch-aspeed/scu_ast2400.h
> b/arch/arm/include/asm/arch-aspeed/scu_ast2400.h
> > index 9c5d96ae84..17eaaf3e9d 100644
> > --- a/arch/arm/include/asm/arch-aspeed/scu_ast2400.h
> > +++ b/arch/arm/include/asm/arch-aspeed/scu_ast2400.h
> > @@ -75,6 +75,10 @@
> >  #define SCU_PIN_FUN_SCL2               (1 << 14)
> >  #define SCU_PIN_FUN_SDA1               (1 << 13)
> >  #define SCU_PIN_FUN_SDA2               (1 << 15)
> > +#define SCU_PIN_FUN_SGPMCK             (0x1 << 8)
> > +#define SCU_PIN_FUN_SGPMLD             (0x1 << 9)
> > +#define SCU_PIN_FUN_SGPMO              (0x1 << 10)
> > +#define SCU_PIN_FUN_SGPMI              (0x1 << 11)
> >
> >  #define SCU_D2PLL_EXT1_OFF             (1 << 0)
> >  #define SCU_D2PLL_EXT1_BYPASS          (1 << 1)
> > diff --git a/arch/arm/mach-aspeed/ast2400/Kconfig
> b/arch/arm/mach-aspeed/ast2400/Kconfig
> > index f76276860c..c4e88b5140 100644
> > --- a/arch/arm/mach-aspeed/ast2400/Kconfig
> > +++ b/arch/arm/mach-aspeed/ast2400/Kconfig
> > @@ -17,6 +17,10 @@ config TARGET_EVB_AST2400
> >           20 pin JTAG, pinouts for 14 I2Cs, 3 SPIs and eSPI, 8 PWMs.
> >  endchoice
> >
> > +config ENABLE_SGPIO
> > +    tristate "Enable SGPIO in SCU"
> > +       default n
> > +
> >  source "board/aspeed/evb_ast2400/Kconfig"
> >
> >  endif
> > diff --git a/arch/arm/mach-aspeed/ast2400/board_common.c
> b/arch/arm/mach-aspeed/ast2400/board_common.c
> > index 3829b06934..eca2ef03e5 100644
> > --- a/arch/arm/mach-aspeed/ast2400/board_common.c
> > +++ b/arch/arm/mach-aspeed/ast2400/board_common.c
> > @@ -14,6 +14,21 @@ __weak int board_init(void)
> >  {
> >         gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
> >
> > +#ifdef CONFIG_ENABLE_SGPIO
> > +#define SCU_BASE 0x1e6e2000
> > +#define SCU_FUN_PIN_CTRL2 0x84 /* Multi-function Pin Control#2*/
> > +       /* Unlock SCU */
> > +       writel(SCU_UNLOCK_VALUE, SCU_BASE);
> > +
> > +       /* Enable SGPIO Master */
> > +       u32 reg = readl(SCU_BASE + SCU_FUN_PIN_CTRL2);
> > +
> > +       reg |= (SCU_PIN_FUN_SGPMI  |
> > +                       SCU_PIN_FUN_SGPMO  |
> > +                       SCU_PIN_FUN_SGPMLD |
> > +                       SCU_PIN_FUN_SGPMCK);
> > +       writel(reg, SCU_BASE + SCU_FUN_PIN_CTRL2);
> > +#endif
> >         return 0;
> >  }
> >
> > --
> > 2.31.1.295.g9ea45b61b8-goog
> >
>
Willy Tu May 26, 2021, 3:49 p.m. UTC | #3
ping

On Tue, Apr 13, 2021 at 5:06 PM Willy Tu <wltu@google.com> wrote:

> Hi Joel,
>
> thanks for the response.
>
> Sorry, I did not update the patch to include the branch name. I'll be more
> careful next time.
>
> This change should be in `v2019.04-aspeed-openbmc` and the other patch in
> https://lore.kernel.org/openbmc/20210413161238.2816187-1-wltu@google.com/ should
> be in `v2016.07-aspeed-openbmc`.
>
> I have not tested this change, but have tested
> https://lore.kernel.org/openbmc/20210413161238.2816187-1-wltu@google.com/ that
> I based off of (Which I have tested with my setup). Will that be an issue?
>
> Best,
>
> Willy Tu
>
> On Tue, Apr 13, 2021 at 4:32 PM Joel Stanley <joel@jms.id.au> wrote:
>
>> Hi Willy,
>>
>> On Tue, 13 Apr 2021 at 16:11, Willy Tu <wltu@google.com> wrote:
>> >
>> > Add option to enable register for SGPIO in SCU.
>> >
>> > Included new function register values for ast2400
>> > SCU and enable the SGPIO function in board init.
>>
>> Which branch would you like this patch applied to?
>>
>> >
>> > Signed-off-by: Willy Tu <wltu@google.com>
>> > ---
>> >  arch/arm/include/asm/arch-aspeed/scu_ast2400.h |  4 ++++
>> >  arch/arm/mach-aspeed/ast2400/Kconfig           |  4 ++++
>> >  arch/arm/mach-aspeed/ast2400/board_common.c    | 15 +++++++++++++++
>> >  3 files changed, 23 insertions(+)
>> >
>> > diff --git a/arch/arm/include/asm/arch-aspeed/scu_ast2400.h
>> b/arch/arm/include/asm/arch-aspeed/scu_ast2400.h
>> > index 9c5d96ae84..17eaaf3e9d 100644
>> > --- a/arch/arm/include/asm/arch-aspeed/scu_ast2400.h
>> > +++ b/arch/arm/include/asm/arch-aspeed/scu_ast2400.h
>> > @@ -75,6 +75,10 @@
>> >  #define SCU_PIN_FUN_SCL2               (1 << 14)
>> >  #define SCU_PIN_FUN_SDA1               (1 << 13)
>> >  #define SCU_PIN_FUN_SDA2               (1 << 15)
>> > +#define SCU_PIN_FUN_SGPMCK             (0x1 << 8)
>> > +#define SCU_PIN_FUN_SGPMLD             (0x1 << 9)
>> > +#define SCU_PIN_FUN_SGPMO              (0x1 << 10)
>> > +#define SCU_PIN_FUN_SGPMI              (0x1 << 11)
>> >
>> >  #define SCU_D2PLL_EXT1_OFF             (1 << 0)
>> >  #define SCU_D2PLL_EXT1_BYPASS          (1 << 1)
>> > diff --git a/arch/arm/mach-aspeed/ast2400/Kconfig
>> b/arch/arm/mach-aspeed/ast2400/Kconfig
>> > index f76276860c..c4e88b5140 100644
>> > --- a/arch/arm/mach-aspeed/ast2400/Kconfig
>> > +++ b/arch/arm/mach-aspeed/ast2400/Kconfig
>> > @@ -17,6 +17,10 @@ config TARGET_EVB_AST2400
>> >           20 pin JTAG, pinouts for 14 I2Cs, 3 SPIs and eSPI, 8 PWMs.
>> >  endchoice
>> >
>> > +config ENABLE_SGPIO
>> > +    tristate "Enable SGPIO in SCU"
>> > +       default n
>> > +
>> >  source "board/aspeed/evb_ast2400/Kconfig"
>> >
>> >  endif
>> > diff --git a/arch/arm/mach-aspeed/ast2400/board_common.c
>> b/arch/arm/mach-aspeed/ast2400/board_common.c
>> > index 3829b06934..eca2ef03e5 100644
>> > --- a/arch/arm/mach-aspeed/ast2400/board_common.c
>> > +++ b/arch/arm/mach-aspeed/ast2400/board_common.c
>> > @@ -14,6 +14,21 @@ __weak int board_init(void)
>> >  {
>> >         gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
>> >
>> > +#ifdef CONFIG_ENABLE_SGPIO
>> > +#define SCU_BASE 0x1e6e2000
>> > +#define SCU_FUN_PIN_CTRL2 0x84 /* Multi-function Pin Control#2*/
>> > +       /* Unlock SCU */
>> > +       writel(SCU_UNLOCK_VALUE, SCU_BASE);
>> > +
>> > +       /* Enable SGPIO Master */
>> > +       u32 reg = readl(SCU_BASE + SCU_FUN_PIN_CTRL2);
>> > +
>> > +       reg |= (SCU_PIN_FUN_SGPMI  |
>> > +                       SCU_PIN_FUN_SGPMO  |
>> > +                       SCU_PIN_FUN_SGPMLD |
>> > +                       SCU_PIN_FUN_SGPMCK);
>> > +       writel(reg, SCU_BASE + SCU_FUN_PIN_CTRL2);
>> > +#endif
>> >         return 0;
>> >  }
>> >
>> > --
>> > 2.31.1.295.g9ea45b61b8-goog
>> >
>>
>
Joel Stanley May 27, 2021, 1:57 a.m. UTC | #4
On Wed, 14 Apr 2021 at 00:06, Willy Tu <wltu@google.com> wrote:
>
> Hi Joel,
>
> thanks for the response.
>
> Sorry, I did not update the patch to include the branch name. I'll be more careful next time.
>
> This change should be in `v2019.04-aspeed-openbmc` and the other patch in https://lore.kernel.org/openbmc/20210413161238.2816187-1-wltu@google.com/ should be in `v2016.07-aspeed-openbmc`.

Okay.

> I have not tested this change, but have tested  https://lore.kernel.org/openbmc/20210413161238.2816187-1-wltu@google.com/ that I based off of (Which I have tested with my setup). Will that be an issue?

What branch are you using for your system?

I strongly encourage you to use the 2019.04 branch if at all possible.

Some review below.

> On Tue, Apr 13, 2021 at 4:32 PM Joel Stanley <joel@jms.id.au> wrote:
>>
>> Hi Willy,
>>
>> On Tue, 13 Apr 2021 at 16:11, Willy Tu <wltu@google.com> wrote:
>> >
>> > Add option to enable register for SGPIO in SCU.
>> >
>> > Included new function register values for ast2400
>> > SCU and enable the SGPIO function in board init.
>>
>> Which branch would you like this patch applied to?
>>
>> >
>> > Signed-off-by: Willy Tu <wltu@google.com>
>> > ---
>> >  arch/arm/include/asm/arch-aspeed/scu_ast2400.h |  4 ++++
>> >  arch/arm/mach-aspeed/ast2400/Kconfig           |  4 ++++
>> >  arch/arm/mach-aspeed/ast2400/board_common.c    | 15 +++++++++++++++
>> >  3 files changed, 23 insertions(+)
>> >
>> > diff --git a/arch/arm/include/asm/arch-aspeed/scu_ast2400.h b/arch/arm/include/asm/arch-aspeed/scu_ast2400.h
>> > index 9c5d96ae84..17eaaf3e9d 100644
>> > --- a/arch/arm/include/asm/arch-aspeed/scu_ast2400.h
>> > +++ b/arch/arm/include/asm/arch-aspeed/scu_ast2400.h
>> > @@ -75,6 +75,10 @@
>> >  #define SCU_PIN_FUN_SCL2               (1 << 14)
>> >  #define SCU_PIN_FUN_SDA1               (1 << 13)
>> >  #define SCU_PIN_FUN_SDA2               (1 << 15)
>> > +#define SCU_PIN_FUN_SGPMCK             (0x1 << 8)
>> > +#define SCU_PIN_FUN_SGPMLD             (0x1 << 9)
>> > +#define SCU_PIN_FUN_SGPMO              (0x1 << 10)
>> > +#define SCU_PIN_FUN_SGPMI              (0x1 << 11)
>> >
>> >  #define SCU_D2PLL_EXT1_OFF             (1 << 0)
>> >  #define SCU_D2PLL_EXT1_BYPASS          (1 << 1)
>> > diff --git a/arch/arm/mach-aspeed/ast2400/Kconfig b/arch/arm/mach-aspeed/ast2400/Kconfig
>> > index f76276860c..c4e88b5140 100644
>> > --- a/arch/arm/mach-aspeed/ast2400/Kconfig
>> > +++ b/arch/arm/mach-aspeed/ast2400/Kconfig
>> > @@ -17,6 +17,10 @@ config TARGET_EVB_AST2400
>> >           20 pin JTAG, pinouts for 14 I2Cs, 3 SPIs and eSPI, 8 PWMs.
>> >  endchoice
>> >
>> > +config ENABLE_SGPIO
>> > +    tristate "Enable SGPIO in SCU"
>> > +       default n

Note that this is the default default in kconfig, you only need to
specify a default if you want some other behaviour.

>> > @@ -14,6 +14,21 @@ __weak int board_init(void)
>> >  {
>> >         gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
>> >
>> > +#ifdef CONFIG_ENABLE_SGPIO
>> > +#define SCU_BASE 0x1e6e2000
>> > +#define SCU_FUN_PIN_CTRL2 0x84 /* Multi-function Pin Control#2*/
>> > +       /* Unlock SCU */
>> > +       writel(SCU_UNLOCK_VALUE, SCU_BASE);
>> > +
>> > +       /* Enable SGPIO Master */
>> > +       u32 reg = readl(SCU_BASE + SCU_FUN_PIN_CTRL2);
>> > +
>> > +       reg |= (SCU_PIN_FUN_SGPMI  |
>> > +                       SCU_PIN_FUN_SGPMO  |
>> > +                       SCU_PIN_FUN_SGPMLD |
>> > +                       SCU_PIN_FUN_SGPMCK);
>> > +       writel(reg, SCU_BASE + SCU_FUN_PIN_CTRL2);
>> > +#endif

Here's what I saw when attempting to compile test your patch:

In file included from ../arch/arm/mach-aspeed/ast2400/board_common.c:6:
../arch/arm/mach-aspeed/ast2400/board_common.c: In function ‘board_init’:
../arch/arm/mach-aspeed/ast2400/board_common.c:21:16: error:
‘SCU_UNLOCK_VALUE’ undeclared (first use in this function)
   21 |         writel(SCU_UNLOCK_VALUE, SCU_BASE);
      |                ^~~~~~~~~~~~~~~~
../arch/arm/include/asm/io.h:117:38: note: in definition of macro ‘writel’
  117 | #define writel(v,c)     ({ u32 __v = v; __iowmb();
__arch_putl(__v,c); __v; })
      |                                      ^
../arch/arm/mach-aspeed/ast2400/board_common.c:21:16: note: each
undeclared identifier is reported only once for each function it
appears in
   21 |         writel(SCU_UNLOCK_VALUE, SCU_BASE);
      |                ^~~~~~~~~~~~~~~~
../arch/arm/include/asm/io.h:117:38: note: in definition of macro ‘writel’
  117 | #define writel(v,c)     ({ u32 __v = v; __iowmb();
__arch_putl(__v,c); __v; })
      |                                      ^
../arch/arm/mach-aspeed/ast2400/board_common.c:26:17: error:
‘SCU_PIN_FUN_SGPMI’ undeclared (first use in this function)
   26 |         reg |= (SCU_PIN_FUN_SGPMI  |
      |                 ^~~~~~~~~~~~~~~~~
../arch/arm/mach-aspeed/ast2400/board_common.c:27:25: error:
‘SCU_PIN_FUN_SGPMO’ undeclared (first use in this function)
   27 |                         SCU_PIN_FUN_SGPMO  |
      |                         ^~~~~~~~~~~~~~~~~
../arch/arm/mach-aspeed/ast2400/board_common.c:28:25: error:
‘SCU_PIN_FUN_SGPMLD’ undeclared (first use in this function)
   28 |                         SCU_PIN_FUN_SGPMLD |
      |                         ^~~~~~~~~~~~~~~~~~
../arch/arm/mach-aspeed/ast2400/board_common.c:29:25: error:
‘SCU_PIN_FUN_SGPMCK’ undeclared (first use in this function)
   29 |                         SCU_PIN_FUN_SGPMCK);
      |                         ^~~~~~~~~~~~~~~~~~


>> >         return 0;
>> >  }
>> >
>> > --
>> > 2.31.1.295.g9ea45b61b8-goog
>> >
Willy Tu May 27, 2021, 3:14 a.m. UTC | #5
On Wed, May 26, 2021 at 6:57 PM Joel Stanley <joel@jms.id.au> wrote:

> On Wed, 14 Apr 2021 at 00:06, Willy Tu <wltu@google.com> wrote:
> >
> > Hi Joel,
> >
> > thanks for the response.
> >
> > Sorry, I did not update the patch to include the branch name. I'll be
> more careful next time.
> >
> > This change should be in `v2019.04-aspeed-openbmc` and the other patch
> in
> https://lore.kernel.org/openbmc/20210413161238.2816187-1-wltu@google.com/
> should be in `v2016.07-aspeed-openbmc`.
>
> Okay.
>
> > I have not tested this change, but have tested
> https://lore.kernel.org/openbmc/20210413161238.2816187-1-wltu@google.com/
> that I based off of (Which I have tested with my setup). Will that be an
> issue?
>
> What branch are you using for your system?
>
> I strongly encourage you to use the 2019.04 branch if at all possible.
>
> Some review below.
>

The system that I was using was based on v2016.07-aspeed-openbmc . It is an
old system and we don't plan on migrating the u-boot version for it. We
don't have any system that is using aspeed other than this one.


>
> > On Tue, Apr 13, 2021 at 4:32 PM Joel Stanley <joel@jms.id.au> wrote:
> >>
> >> Hi Willy,
> >>
> >> On Tue, 13 Apr 2021 at 16:11, Willy Tu <wltu@google.com> wrote:
> >> >
> >> > Add option to enable register for SGPIO in SCU.
> >> >
> >> > Included new function register values for ast2400
> >> > SCU and enable the SGPIO function in board init.
> >>
> >> Which branch would you like this patch applied to?
> >>
> >> >
> >> > Signed-off-by: Willy Tu <wltu@google.com>
> >> > ---
> >> >  arch/arm/include/asm/arch-aspeed/scu_ast2400.h |  4 ++++
> >> >  arch/arm/mach-aspeed/ast2400/Kconfig           |  4 ++++
> >> >  arch/arm/mach-aspeed/ast2400/board_common.c    | 15 +++++++++++++++
> >> >  3 files changed, 23 insertions(+)
> >> >
> >> > diff --git a/arch/arm/include/asm/arch-aspeed/scu_ast2400.h
> b/arch/arm/include/asm/arch-aspeed/scu_ast2400.h
> >> > index 9c5d96ae84..17eaaf3e9d 100644
> >> > --- a/arch/arm/include/asm/arch-aspeed/scu_ast2400.h
> >> > +++ b/arch/arm/include/asm/arch-aspeed/scu_ast2400.h
> >> > @@ -75,6 +75,10 @@
> >> >  #define SCU_PIN_FUN_SCL2               (1 << 14)
> >> >  #define SCU_PIN_FUN_SDA1               (1 << 13)
> >> >  #define SCU_PIN_FUN_SDA2               (1 << 15)
> >> > +#define SCU_PIN_FUN_SGPMCK             (0x1 << 8)
> >> > +#define SCU_PIN_FUN_SGPMLD             (0x1 << 9)
> >> > +#define SCU_PIN_FUN_SGPMO              (0x1 << 10)
> >> > +#define SCU_PIN_FUN_SGPMI              (0x1 << 11)
> >> >
> >> >  #define SCU_D2PLL_EXT1_OFF             (1 << 0)
> >> >  #define SCU_D2PLL_EXT1_BYPASS          (1 << 1)
> >> > diff --git a/arch/arm/mach-aspeed/ast2400/Kconfig
> b/arch/arm/mach-aspeed/ast2400/Kconfig
> >> > index f76276860c..c4e88b5140 100644
> >> > --- a/arch/arm/mach-aspeed/ast2400/Kconfig
> >> > +++ b/arch/arm/mach-aspeed/ast2400/Kconfig
> >> > @@ -17,6 +17,10 @@ config TARGET_EVB_AST2400
> >> >           20 pin JTAG, pinouts for 14 I2Cs, 3 SPIs and eSPI, 8 PWMs.
> >> >  endchoice
> >> >
> >> > +config ENABLE_SGPIO
> >> > +    tristate "Enable SGPIO in SCU"
> >> > +       default n
>
> Note that this is the default default in kconfig, you only need to
> specify a default if you want some other behaviour.
>
> >> > @@ -14,6 +14,21 @@ __weak int board_init(void)
> >> >  {
> >> >         gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
> >> >
> >> > +#ifdef CONFIG_ENABLE_SGPIO
> >> > +#define SCU_BASE 0x1e6e2000
> >> > +#define SCU_FUN_PIN_CTRL2 0x84 /* Multi-function Pin Control#2*/
> >> > +       /* Unlock SCU */
> >> > +       writel(SCU_UNLOCK_VALUE, SCU_BASE);
> >> > +
> >> > +       /* Enable SGPIO Master */
> >> > +       u32 reg = readl(SCU_BASE + SCU_FUN_PIN_CTRL2);
> >> > +
> >> > +       reg |= (SCU_PIN_FUN_SGPMI  |
> >> > +                       SCU_PIN_FUN_SGPMO  |
> >> > +                       SCU_PIN_FUN_SGPMLD |
> >> > +                       SCU_PIN_FUN_SGPMCK);
> >> > +       writel(reg, SCU_BASE + SCU_FUN_PIN_CTRL2);
> >> > +#endif
>
> Here's what I saw when attempting to compile test your patch:
>
> In file included from ../arch/arm/mach-aspeed/ast2400/board_common.c:6:
> ../arch/arm/mach-aspeed/ast2400/board_common.c: In function ‘board_init’:
> ../arch/arm/mach-aspeed/ast2400/board_common.c:21:16: error:
> ‘SCU_UNLOCK_VALUE’ undeclared (first use in this function)
>    21 |         writel(SCU_UNLOCK_VALUE, SCU_BASE);
>       |                ^~~~~~~~~~~~~~~~
> ../arch/arm/include/asm/io.h:117:38: note: in definition of macro ‘writel’
>   117 | #define writel(v,c)     ({ u32 __v = v; __iowmb();
> __arch_putl(__v,c); __v; })
>       |                                      ^
> ../arch/arm/mach-aspeed/ast2400/board_common.c:21:16: note: each
> undeclared identifier is reported only once for each function it
> appears in
>    21 |         writel(SCU_UNLOCK_VALUE, SCU_BASE);
>       |                ^~~~~~~~~~~~~~~~
> ../arch/arm/include/asm/io.h:117:38: note: in definition of macro ‘writel’
>   117 | #define writel(v,c)     ({ u32 __v = v; __iowmb();
> __arch_putl(__v,c); __v; })
>       |                                      ^
> ../arch/arm/mach-aspeed/ast2400/board_common.c:26:17: error:
> ‘SCU_PIN_FUN_SGPMI’ undeclared (first use in this function)
>    26 |         reg |= (SCU_PIN_FUN_SGPMI  |
>       |                 ^~~~~~~~~~~~~~~~~
> ../arch/arm/mach-aspeed/ast2400/board_common.c:27:25: error:
> ‘SCU_PIN_FUN_SGPMO’ undeclared (first use in this function)
>    27 |                         SCU_PIN_FUN_SGPMO  |
>       |                         ^~~~~~~~~~~~~~~~~
> ../arch/arm/mach-aspeed/ast2400/board_common.c:28:25: error:
> ‘SCU_PIN_FUN_SGPMLD’ undeclared (first use in this function)
>    28 |                         SCU_PIN_FUN_SGPMLD |
>       |                         ^~~~~~~~~~~~~~~~~~
> ../arch/arm/mach-aspeed/ast2400/board_common.c:29:25: error:
> ‘SCU_PIN_FUN_SGPMCK’ undeclared (first use in this function)
>    29 |                         SCU_PIN_FUN_SGPMCK);
>       |                         ^~~~~~~~~~~~~~~~~~
>
>
> >> >         return 0;
> >> >  }
> >> >
> >> > --
> >> > 2.31.1.295.g9ea45b61b8-goog
> >> >
>

Thanks for the feedback. I'll address the issue and apply a new patch.

Willy Tu
diff mbox series

Patch

diff --git a/arch/arm/include/asm/arch-aspeed/scu_ast2400.h b/arch/arm/include/asm/arch-aspeed/scu_ast2400.h
index 9c5d96ae84..17eaaf3e9d 100644
--- a/arch/arm/include/asm/arch-aspeed/scu_ast2400.h
+++ b/arch/arm/include/asm/arch-aspeed/scu_ast2400.h
@@ -75,6 +75,10 @@ 
 #define SCU_PIN_FUN_SCL2		(1 << 14)
 #define SCU_PIN_FUN_SDA1		(1 << 13)
 #define SCU_PIN_FUN_SDA2		(1 << 15)
+#define SCU_PIN_FUN_SGPMCK		(0x1 << 8)
+#define SCU_PIN_FUN_SGPMLD		(0x1 << 9)
+#define SCU_PIN_FUN_SGPMO		(0x1 << 10)
+#define SCU_PIN_FUN_SGPMI		(0x1 << 11)
 
 #define SCU_D2PLL_EXT1_OFF		(1 << 0)
 #define SCU_D2PLL_EXT1_BYPASS		(1 << 1)
diff --git a/arch/arm/mach-aspeed/ast2400/Kconfig b/arch/arm/mach-aspeed/ast2400/Kconfig
index f76276860c..c4e88b5140 100644
--- a/arch/arm/mach-aspeed/ast2400/Kconfig
+++ b/arch/arm/mach-aspeed/ast2400/Kconfig
@@ -17,6 +17,10 @@  config TARGET_EVB_AST2400
 	  20 pin JTAG, pinouts for 14 I2Cs, 3 SPIs and eSPI, 8 PWMs.
 endchoice
 
+config ENABLE_SGPIO
+    tristate "Enable SGPIO in SCU"
+	default n
+
 source "board/aspeed/evb_ast2400/Kconfig"
 
 endif
diff --git a/arch/arm/mach-aspeed/ast2400/board_common.c b/arch/arm/mach-aspeed/ast2400/board_common.c
index 3829b06934..eca2ef03e5 100644
--- a/arch/arm/mach-aspeed/ast2400/board_common.c
+++ b/arch/arm/mach-aspeed/ast2400/board_common.c
@@ -14,6 +14,21 @@  __weak int board_init(void)
 {
 	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
 
+#ifdef CONFIG_ENABLE_SGPIO
+#define SCU_BASE 0x1e6e2000
+#define SCU_FUN_PIN_CTRL2 0x84 /* Multi-function Pin Control#2*/
+	/* Unlock SCU */
+	writel(SCU_UNLOCK_VALUE, SCU_BASE);
+
+	/* Enable SGPIO Master */
+	u32 reg = readl(SCU_BASE + SCU_FUN_PIN_CTRL2);
+
+	reg |= (SCU_PIN_FUN_SGPMI  |
+			SCU_PIN_FUN_SGPMO  |
+			SCU_PIN_FUN_SGPMLD |
+			SCU_PIN_FUN_SGPMCK);
+	writel(reg, SCU_BASE + SCU_FUN_PIN_CTRL2);
+#endif
 	return 0;
 }