diff mbox series

[u-boot,v2019.04-aspeed-openbmc] ast2600: spl: Include RAM loader in BL2 ifdef

Message ID 20210128092540.343138-1-joel@jms.id.au
State New
Headers show
Series [u-boot,v2019.04-aspeed-openbmc] ast2600: spl: Include RAM loader in BL2 ifdef | expand

Commit Message

Joel Stanley Jan. 28, 2021, 9:25 a.m. UTC
With this patch all of the BL2 verification call sites are behind the
Kconfig symbol. When it is disabled, 1903 bytes is saved.

Signed-off-by: Joel Stanley <joel@jms.id.au>
---
 arch/arm/mach-aspeed/ast2600/spl_boot.c | 2 ++
 1 file changed, 2 insertions(+)

Comments

Andrew Jeffery Jan. 28, 2021, 9:28 a.m. UTC | #1
On Thu, 28 Jan 2021, at 19:55, Joel Stanley wrote:
> With this patch all of the BL2 verification call sites are behind the
> Kconfig symbol. When it is disabled, 1903 bytes is saved.
> 
> Signed-off-by: Joel Stanley <joel@jms.id.au>

Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Klaus Heinrich Kiwi Jan. 28, 2021, 2:03 p.m. UTC | #2
On 1/28/2021 6:25 AM, Joel Stanley wrote:
> With this patch all of the BL2 verification call sites are behind the
> Kconfig symbol. When it is disabled, 1903 bytes is saved.
> 
> Signed-off-by: Joel Stanley <joel@jms.id.au>

>   SPL_LOAD_IMAGE_METHOD("RAM with Aspeed Secure Boot", 0, ASPEED_SECBOOT_DEVICE_RAM, aspeed_secboot_spl_ram_load_image);
> +#endif /* ASPEED_SECBOOT_BL2 */

Thanks,

Reviewed-by: Klaus Heinrich Kiwi <klaus@linux.vnet.ibm.com>
diff mbox series

Patch

diff --git a/arch/arm/mach-aspeed/ast2600/spl_boot.c b/arch/arm/mach-aspeed/ast2600/spl_boot.c
index 98cf72bf440d..06800940109e 100644
--- a/arch/arm/mach-aspeed/ast2600/spl_boot.c
+++ b/arch/arm/mach-aspeed/ast2600/spl_boot.c
@@ -23,6 +23,7 @@  static int aspeed_spl_ram_load_image(struct spl_image_info *spl_image,
 }
 SPL_LOAD_IMAGE_METHOD("RAM", 0, ASPEED_BOOT_DEVICE_RAM, aspeed_spl_ram_load_image);
 
+#if IS_ENABLED(ASPEED_SECBOOT_BL2)
 static int aspeed_secboot_spl_ram_load_image(struct spl_image_info *spl_image,
 				      struct spl_boot_device *bootdev)
 {
@@ -41,6 +42,7 @@  static int aspeed_secboot_spl_ram_load_image(struct spl_image_info *spl_image,
 	return 0;
 }
 SPL_LOAD_IMAGE_METHOD("RAM with Aspeed Secure Boot", 0, ASPEED_SECBOOT_DEVICE_RAM, aspeed_secboot_spl_ram_load_image);
+#endif /* ASPEED_SECBOOT_BL2 */
 
 #if IS_ENABLED(CONFIG_SPL_MMC_SUPPORT)
 static int aspeed_spl_mmc_load_image(struct spl_image_info *spl_image,