| Message ID | 20201211215427.3281681-3-kunyi@google.com |
|---|---|
| State | New |
| Headers | show |
| Series | SB-TSI hwmon driver v5 | expand |
On Fri, Dec 11, 2020 at 01:54:26PM -0800, Kun Yi wrote: > Document the SB-TSI sensor interface driver. > > Signed-off-by: Kun Yi <kunyi@google.com> Applied. Note that I added the SPDX identifier to match the one used in the source file. Guenter > --- > Documentation/hwmon/index.rst | 1 + > Documentation/hwmon/sbtsi_temp.rst | 40 ++++++++++++++++++++++++++++++ > 2 files changed, 41 insertions(+) > create mode 100644 Documentation/hwmon/sbtsi_temp.rst > > diff --git a/Documentation/hwmon/index.rst b/Documentation/hwmon/index.rst > index fd6fae46b99c..509fb3bcafb2 100644 > --- a/Documentation/hwmon/index.rst > +++ b/Documentation/hwmon/index.rst > @@ -151,6 +151,7 @@ Hardware Monitoring Kernel Drivers > pxe1610 > pwm-fan > raspberrypi-hwmon > + sbtsi_temp > sch5627 > sch5636 > scpi-hwmon > diff --git a/Documentation/hwmon/sbtsi_temp.rst b/Documentation/hwmon/sbtsi_temp.rst > new file mode 100644 > index 000000000000..9f0f197c8aa2 > --- /dev/null > +++ b/Documentation/hwmon/sbtsi_temp.rst > @@ -0,0 +1,40 @@ > +Kernel driver sbtsi_temp > +================== > + > +Supported hardware: > + > + * Sideband interface (SBI) Temperature Sensor Interface (SB-TSI) > + compliant AMD SoC temperature device. > + > + Prefix: 'sbtsi_temp' > + > + Addresses scanned: This driver doesn't support address scanning. > + > + To instantiate this driver on an AMD CPU with SB-TSI > + support, the i2c bus number would be the bus connected from the board > + management controller (BMC) to the CPU. The i2c address is specified in > + Section 6.3.1 of the SoC register reference: The SB-TSI address is normally > + 98h for socket 0 and 90h for socket 1, but it could vary based on hardware > + address select pins. > + > + Datasheet: The SB-TSI interface and protocol is available as part of > + the open source SoC register reference at: > + > + https://www.amd.com/system/files/TechDocs/56255_OSRR.pdf > + > + The Advanced Platform Management Link (APML) Specification is > + available at: > + > + http://developer.amd.com/wordpress/media/2012/10/41918.pdf > + > +Author: Kun Yi <kunyi@google.com> > + > +Description > +----------- > + > +The SBI temperature sensor interface (SB-TSI) is an emulation of the software > +and physical interface of a typical 8-pin remote temperature sensor (RTS) on > +AMD SoCs. It implements one temperature sensor with readings and limit > +registers encode the temperature in increments of 0.125 from 0 to 255.875. > +Limits can be set through the writable thresholds, and if reached will trigger > +corresponding alert signals.
diff --git a/Documentation/hwmon/index.rst b/Documentation/hwmon/index.rst index fd6fae46b99c..509fb3bcafb2 100644 --- a/Documentation/hwmon/index.rst +++ b/Documentation/hwmon/index.rst @@ -151,6 +151,7 @@ Hardware Monitoring Kernel Drivers pxe1610 pwm-fan raspberrypi-hwmon + sbtsi_temp sch5627 sch5636 scpi-hwmon diff --git a/Documentation/hwmon/sbtsi_temp.rst b/Documentation/hwmon/sbtsi_temp.rst new file mode 100644 index 000000000000..9f0f197c8aa2 --- /dev/null +++ b/Documentation/hwmon/sbtsi_temp.rst @@ -0,0 +1,40 @@ +Kernel driver sbtsi_temp +================== + +Supported hardware: + + * Sideband interface (SBI) Temperature Sensor Interface (SB-TSI) + compliant AMD SoC temperature device. + + Prefix: 'sbtsi_temp' + + Addresses scanned: This driver doesn't support address scanning. + + To instantiate this driver on an AMD CPU with SB-TSI + support, the i2c bus number would be the bus connected from the board + management controller (BMC) to the CPU. The i2c address is specified in + Section 6.3.1 of the SoC register reference: The SB-TSI address is normally + 98h for socket 0 and 90h for socket 1, but it could vary based on hardware + address select pins. + + Datasheet: The SB-TSI interface and protocol is available as part of + the open source SoC register reference at: + + https://www.amd.com/system/files/TechDocs/56255_OSRR.pdf + + The Advanced Platform Management Link (APML) Specification is + available at: + + http://developer.amd.com/wordpress/media/2012/10/41918.pdf + +Author: Kun Yi <kunyi@google.com> + +Description +----------- + +The SBI temperature sensor interface (SB-TSI) is an emulation of the software +and physical interface of a typical 8-pin remote temperature sensor (RTS) on +AMD SoCs. It implements one temperature sensor with readings and limit +registers encode the temperature in increments of 0.125 from 0 to 255.875. +Limits can be set through the writable thresholds, and if reached will trigger +corresponding alert signals.
Document the SB-TSI sensor interface driver. Signed-off-by: Kun Yi <kunyi@google.com> --- Documentation/hwmon/index.rst | 1 + Documentation/hwmon/sbtsi_temp.rst | 40 ++++++++++++++++++++++++++++++ 2 files changed, 41 insertions(+) create mode 100644 Documentation/hwmon/sbtsi_temp.rst