diff --git a/drivers/fsi/fsi-master-aspeed.c b/drivers/fsi/fsi-master-aspeed.c
index c98b1bf179a8..7e515b43b7a6 100644
--- a/drivers/fsi/fsi-master-aspeed.c
+++ b/drivers/fsi/fsi-master-aspeed.c
@@ -188,9 +188,10 @@ static u32 get_xfer_size(size_t size) {
 	}
 }
 
-static u32 opb_write(void __iomem *base, uint32_t addr, uint32_t val,
-		     size_t size)
+static u32 opb_write(struct fsi_master_aspeed *aspeed, uint32_t addr,
+		     uint32_t val, size_t size)
 {
+	void __iomem *base = aspeed->base;
 	u32 reg, ret, status, xfer_size;
 
 	xfer_size = get_xfer_size(size);
@@ -223,8 +224,10 @@ static u32 opb_write(void __iomem *base, uint32_t addr, uint32_t val,
 	return 0;
 }
 
-static int opb_read(void __iomem *base, uint32_t addr, size_t size, u32 *out)
+static int opb_read(struct fsi_master_aspeed *aspeed, uint32_t addr,
+		    size_t size, u32 *out)
 {
+	void __iomem *base = aspeed->base;
 	u32 result, reg, xfer_size;
 	int status, ret;
 
@@ -271,9 +274,9 @@ static int check_errors(struct fsi_master_aspeed *aspeed, int err)
 	 if (trace_fsi_master_aspeed_opb_error_enabled()) {
 		 __be32 mresp0, mstap0, mesrb0;
 
-		 opb_read(aspeed->base, ctrl_base + FSI_MRESP0, 4, &mresp0);
-		 opb_read(aspeed->base, ctrl_base + FSI_MSTAP0, 4, &mstap0);
-		 opb_read(aspeed->base, ctrl_base + FSI_MESRB0, 4, &mesrb0);
+		 opb_read(aspeed, ctrl_base + FSI_MRESP0, 4, &mresp0);
+		 opb_read(aspeed, ctrl_base + FSI_MSTAP0, 4, &mstap0);
+		 opb_read(aspeed, ctrl_base + FSI_MESRB0, 4, &mesrb0);
 
 		 trace_fsi_master_aspeed_opb_error(
 				 be32_to_cpu(mresp0),
@@ -285,7 +288,7 @@ static int check_errors(struct fsi_master_aspeed *aspeed, int err)
 		/* Check MAEB (0x70) ? */
 
 		/* Then clear errors in master */
-		ret = opb_write(aspeed->base, ctrl_base + 0xd0,
+		ret = opb_write(aspeed, ctrl_base + 0xd0,
 				cpu_to_be32(0x20000000), 4);
 		if (ret) {
 			/* TODO: log? return different code? */
@@ -308,7 +311,7 @@ static int aspeed_master_read(struct fsi_master *master, int link,
 		return -EINVAL;
 
 	addr += link * FSI_HUB_LINK_SIZE;
-	ret = opb_read(aspeed->base, fsi_base + addr, size, val);
+	ret = opb_read(aspeed, fsi_base + addr, size, val);
 
 	ret = check_errors(aspeed, ret);
 	if (ret)
@@ -327,7 +330,7 @@ static int aspeed_master_write(struct fsi_master *master, int link,
 		return -EINVAL;
 
 	addr += link * FSI_HUB_LINK_SIZE;
-	ret = opb_write(aspeed->base, fsi_base + addr, *(uint32_t *)val, size);
+	ret = opb_write(aspeed, fsi_base + addr, *(uint32_t *)val, size);
 
 	ret = check_errors(aspeed, ret);
 	if (ret)
@@ -347,12 +350,12 @@ static int aspeed_master_link_enable(struct fsi_master *master, int link)
 
 	reg = cpu_to_be32(0x80000000 >> bit);
 
-	result = opb_write(aspeed->base, ctrl_base + FSI_MSENP0 + (4 * idx),
+	result = opb_write(aspeed, ctrl_base + FSI_MSENP0 + (4 * idx),
 			reg, 4);
 
 	mdelay(FSI_LINK_ENABLE_SETUP_TIME);
 
-	ret = opb_read(aspeed->base, ctrl_base + FSI_MENP0 + (4 * idx),
+	ret = opb_read(aspeed, ctrl_base + FSI_MENP0 + (4 * idx),
 			4, &result);
 	if (ret)
 		return ret;
@@ -428,46 +431,46 @@ static int aspeed_master_init(struct fsi_master_aspeed *aspeed)
 
 	reg = cpu_to_be32(FSI_MRESP_RST_ALL_MASTER | FSI_MRESP_RST_ALL_LINK
 			| FSI_MRESP_RST_MCR | FSI_MRESP_RST_PYE);
-	opb_write(aspeed->base, ctrl_base + FSI_MRESP0, reg, 4);
+	opb_write(aspeed, ctrl_base + FSI_MRESP0, reg, 4);
 
 	/* Initialize the MFSI (hub master) engine */
 	reg = cpu_to_be32(FSI_MRESP_RST_ALL_MASTER | FSI_MRESP_RST_ALL_LINK
 			| FSI_MRESP_RST_MCR | FSI_MRESP_RST_PYE);
-	opb_write(aspeed->base, ctrl_base + FSI_MRESP0, reg, 4);
+	opb_write(aspeed, ctrl_base + FSI_MRESP0, reg, 4);
 
 	reg = cpu_to_be32(FSI_MECTRL_EOAE | FSI_MECTRL_P8_AUTO_TERM);
-	opb_write(aspeed->base, ctrl_base + FSI_MECTRL, reg, 4);
+	opb_write(aspeed, ctrl_base + FSI_MECTRL, reg, 4);
 
 	reg = cpu_to_be32(FSI_MMODE_ECRC | FSI_MMODE_EPC | FSI_MMODE_RELA
 			| fsi_mmode_crs0(DEFAULT_DIVISOR)
 			| fsi_mmode_crs1(DEFAULT_DIVISOR)
 			| FSI_MMODE_P8_TO_LSB);
-	opb_write(aspeed->base, ctrl_base + FSI_MMODE, reg, 4);
+	opb_write(aspeed, ctrl_base + FSI_MMODE, reg, 4);
 
 	reg = cpu_to_be32(0xffff0000);
-	opb_write(aspeed->base, ctrl_base + FSI_MDLYR, reg, 4);
+	opb_write(aspeed, ctrl_base + FSI_MDLYR, reg, 4);
 
 	reg = cpu_to_be32(~0);
-	opb_write(aspeed->base, ctrl_base + FSI_MSENP0, reg, 4);
+	opb_write(aspeed, ctrl_base + FSI_MSENP0, reg, 4);
 
 	/* Leave enabled long enough for master logic to set up */
 	mdelay(FSI_LINK_ENABLE_SETUP_TIME);
 
-	opb_write(aspeed->base, ctrl_base + FSI_MCENP0, reg, 4);
+	opb_write(aspeed, ctrl_base + FSI_MCENP0, reg, 4);
 
-	opb_read(aspeed->base, ctrl_base + FSI_MAEB, 4, NULL);
+	opb_read(aspeed, ctrl_base + FSI_MAEB, 4, NULL);
 
 	reg = cpu_to_be32(FSI_MRESP_RST_ALL_MASTER | FSI_MRESP_RST_ALL_LINK);
-	opb_write(aspeed->base, ctrl_base + FSI_MRESP0, reg, 4);
+	opb_write(aspeed, ctrl_base + FSI_MRESP0, reg, 4);
 
-	opb_read(aspeed->base, ctrl_base + FSI_MLEVP0, 4, NULL);
+	opb_read(aspeed, ctrl_base + FSI_MLEVP0, 4, NULL);
 
 	/* Reset the master bridge */
 	reg = cpu_to_be32(FSI_MRESB_RST_GEN);
-	opb_write(aspeed->base, ctrl_base + FSI_MRESB0, reg, 4);
+	opb_write(aspeed, ctrl_base + FSI_MRESB0, reg, 4);
 
 	reg = cpu_to_be32(FSI_MRESB_RST_ERR);
-	opb_write(aspeed->base, ctrl_base + FSI_MRESB0, reg, 4);
+	opb_write(aspeed, ctrl_base + FSI_MRESB0, reg, 4);
 
 	return 0;
 }
@@ -478,7 +481,7 @@ static int fsi_master_aspeed_debugfs_get(void *data, u64 *val)
 	u32 out;
 	struct fsi_master_aspeed_debugfs_entry *entry = data;
 
-	rc = opb_read(entry->aspeed->base, ctrl_base + entry->addr, 4, &out);
+	rc = opb_read(entry->aspeed, ctrl_base + entry->addr, 4, &out);
 	if (rc)
 		return rc;
 
@@ -491,7 +494,7 @@ static int fsi_master_aspeed_debugfs_set(void *data, u64 val)
 	u32 in = cpu_to_be32((u32)(val & 0xFFFFFFFFULL));
 	struct fsi_master_aspeed_debugfs_entry *entry = data;
 
-	rc = opb_write(entry->aspeed->base, ctrl_base + entry->addr, in, 4);
+	rc = opb_write(entry->aspeed, ctrl_base + entry->addr, in, 4);
 	if (rc)
 		return rc;
 
@@ -507,7 +510,7 @@ static int fsi_master_aspeed_clock_debugfs_get(void *data, u64 *val)
 	u32 out;
 	int rc;
 
-	rc = opb_read(aspeed->base, ctrl_base, 4, &out);
+	rc = opb_read(aspeed, ctrl_base, 4, &out);
 	if (rc)
 		return rc;
 
@@ -525,7 +528,7 @@ static int fsi_master_aspeed_clock_debugfs_set(void *data, u64 val)
 	if (val > 0x3ff)
 		return -EINVAL;
 
-	rc = opb_read(aspeed->base, ctrl_base, 4, &raw);
+	rc = opb_read(aspeed, ctrl_base, 4, &raw);
 	if (rc)
 		return rc;
 
@@ -534,7 +537,7 @@ static int fsi_master_aspeed_clock_debugfs_set(void *data, u64 val)
 	reg &= ~(0x3ff << 18);
 	reg |= (val & 0x3ff) << 18;
 
-	rc = opb_write(aspeed->base, ctrl_base, cpu_to_be32(reg), 4);
+	rc = opb_write(aspeed, ctrl_base, cpu_to_be32(reg), 4);
 	if (rc)
 		return rc;
 
@@ -598,7 +601,7 @@ static int fsi_master_aspeed_probe(struct platform_device *pdev)
 	 */
 	writel(0x1, aspeed->base + OPB0_SELECT);
 
-	rc = opb_read(aspeed->base, ctrl_base + FSI_MVER, 4, &raw);
+	rc = opb_read(aspeed, ctrl_base + FSI_MVER, 4, &raw);
 	if (rc) {
 		dev_err(&pdev->dev, "failed to read hub version\n");
 		return rc;
