@@ -1,6 +1,6 @@
* Aspeed BT (Block Transfer) IPMI interface
-The Aspeed SOCs (AST2400 and AST2500) are commonly used as BMCs
+The Aspeed SOCs (AST2400, AST2500 and AST2600) are commonly used as BMCs
(BaseBoard Management Controllers) and the BT interface can be used to
perform in-band IPMI communication with their host.
@@ -9,6 +9,7 @@ Required properties:
- compatible : should be one of
"aspeed,ast2400-ibt-bmc"
"aspeed,ast2500-ibt-bmc"
+ "aspeed,ast2600-ibt-bmc"
- reg: physical address and size of the registers
Optional properties:
@@ -46,6 +46,7 @@ Required properties
- compatible: One of:
"aspeed,ast2400-lpc", "simple-mfd"
"aspeed,ast2500-lpc", "simple-mfd"
+ "aspeed,ast2600-lpc", "simple-mfd"
- reg: contains the physical address and length values of the Aspeed
LPC memory region.
@@ -64,6 +65,7 @@ BMC Node
- compatible: One of:
"aspeed,ast2400-lpc-bmc"
"aspeed,ast2500-lpc-bmc"
+ "aspeed,ast2600-lpc-bmc"
- reg: contains the physical address and length values of the
H8S/2168-compatible LPC controller memory region
@@ -74,6 +76,7 @@ Host Node
- compatible: One of:
"aspeed,ast2400-lpc-host", "simple-mfd", "syscon"
"aspeed,ast2500-lpc-host", "simple-mfd", "syscon"
+ "aspeed,ast2600-lpc-host", "simple-mfd", "syscon"
- reg: contains the address and length values of the host-related
register space for the Aspeed LPC controller
@@ -128,6 +131,7 @@ Required properties:
- compatible: One of:
"aspeed,ast2400-lpc-ctrl";
"aspeed,ast2500-lpc-ctrl";
+ "aspeed,ast2600-lpc-ctrl";
- reg: contains offset/length values of the host interface controller
memory regions
@@ -168,6 +172,7 @@ Required properties:
- compatible: One of:
"aspeed,ast2400-lhc";
"aspeed,ast2500-lhc";
+ "aspeed,ast2600-lhc";
- reg: contains offset/length values of the LHC memory regions. In the
AST2400 and AST2500 there are two regions.
@@ -187,7 +192,8 @@ state of the LPC bus. Some systems may chose to modify this configuration.
Required properties:
- - compatible: "aspeed,ast2500-lpc-reset" or
+ - compatible: "aspeed,ast2600-lpc-reset" or
+ "aspeed,ast2500-lpc-reset"
"aspeed,ast2400-lpc-reset"
- reg: offset and length of the IP in the LHC memory region
- #reset-controller indicates the number of reset cells expected
Assume The AST2600 SoCs contain the same LPC devices as the AST2500. Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com> --- .../devicetree/bindings/ipmi/aspeed,ast2400-ibt-bmc.txt | 3 ++- Documentation/devicetree/bindings/mfd/aspeed-lpc.txt | 8 +++++++- 2 files changed, 9 insertions(+), 2 deletions(-)