Message ID | 20170323184136.7349-1-raltherr@google.com |
---|---|
State | Awaiting Upstream, archived |
Headers | show |
On Fri, Mar 24, 2017 at 5:11 AM, Rick Altherr <raltherr@google.com> wrote: > Signed-off-by: Rick Altherr <raltherr@google.com> > --- > > Changes in v4: None > Changes in v3: > - Consistently write hex contstants with lowercase letters > - Drop model numbers from description as same IP is used in every generation > > Changes in v2: > - Rewritten as an IIO ADC device > > .../devicetree/bindings/iio/adc/aspeed_adc.txt | 20 ++++++++++++++++++++ > 1 file changed, 20 insertions(+) > create mode 100644 Documentation/devicetree/bindings/iio/adc/aspeed_adc.txt > > diff --git a/Documentation/devicetree/bindings/iio/adc/aspeed_adc.txt b/Documentation/devicetree/bindings/iio/adc/aspeed_adc.txt > new file mode 100644 > index 000000000000..674e133b7cd7 > --- /dev/null > +++ b/Documentation/devicetree/bindings/iio/adc/aspeed_adc.txt > @@ -0,0 +1,20 @@ > +Aspeed ADC > + > +This device is a 10-bit converter for 16 voltage channels. All inputs are > +single ended. You could mention that the vref is a fixed depending on the SoC generation. Otherwise, lgtm. Acked-by: Joel Stanley <joel@jms.id.au> Cheers, Joel > + > +Required properties: > +- compatible: Should be "aspeed,ast2400-adc" or "aspeed,ast2500-adc" > +- reg: memory window mapping address and length > +- clocks: Input clock used to derive the sample clock. Expected to be the > + SoC's APB clock. > +- #io-channel-cells: Must be set to <1> to indicate channels are selected > + by index. > + > +Example: > + adc@1e6e9000 { > + compatible = "aspeed,ast2400-adc"; > + reg = <0x1e6e9000 0xb0>; > + clocks = <&clk_apb>; > + #io-channel-cells = <1>; > + }; > -- > 2.12.1.500.gab5fba24ee-goog >
diff --git a/Documentation/devicetree/bindings/iio/adc/aspeed_adc.txt b/Documentation/devicetree/bindings/iio/adc/aspeed_adc.txt new file mode 100644 index 000000000000..674e133b7cd7 --- /dev/null +++ b/Documentation/devicetree/bindings/iio/adc/aspeed_adc.txt @@ -0,0 +1,20 @@ +Aspeed ADC + +This device is a 10-bit converter for 16 voltage channels. All inputs are +single ended. + +Required properties: +- compatible: Should be "aspeed,ast2400-adc" or "aspeed,ast2500-adc" +- reg: memory window mapping address and length +- clocks: Input clock used to derive the sample clock. Expected to be the + SoC's APB clock. +- #io-channel-cells: Must be set to <1> to indicate channels are selected + by index. + +Example: + adc@1e6e9000 { + compatible = "aspeed,ast2400-adc"; + reg = <0x1e6e9000 0xb0>; + clocks = <&clk_apb>; + #io-channel-cells = <1>; + };
Signed-off-by: Rick Altherr <raltherr@google.com> --- Changes in v4: None Changes in v3: - Consistently write hex contstants with lowercase letters - Drop model numbers from description as same IP is used in every generation Changes in v2: - Rewritten as an IIO ADC device .../devicetree/bindings/iio/adc/aspeed_adc.txt | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) create mode 100644 Documentation/devicetree/bindings/iio/adc/aspeed_adc.txt