@@ -49,4 +49,10 @@ extern void ast_scu_init_eth(u8 num);
extern void ast_scu_multi_func_eth(u8 num);
extern void ast_scu_multi_func_romcs(u8 num);
+/*
+ * Enable I2C controller and pins for a particular device.
+ * Device numbering starts at 1
+ */
+extern void ast_scu_enable_i2c(u8 num);
+
#endif
@@ -509,3 +509,31 @@ void ast_scu_get_who_init_dram(void)
break;
}
}
+
+void ast_scu_enable_i2c(u8 bus_num)
+{
+ if (bus_num > SCU_I2C_MAX_BUS_NUM) {
+ debug("%s: bus_num is out of range, must be [%d - %d]\n",
+ __func__, SCU_I2C_MIN_BUS_NUM, SCU_I2C_MAX_BUS_NUM);
+ return;
+ }
+
+ if (bus_num == 0) {
+ /* Enable I2C Controllers */
+ clrbits_le32(AST_SCU_BASE + AST_SCU_RESET, SCU_RESET_I2C);
+ } else if (bus_num >= 3) {
+ setbits_le32(AST_SCU_BASE + AST_SCU_FUN_PIN_CTRL5,
+ SCU_FUN_PIN_I2C(bus_num));
+ /* In earlier versions of the SoC these pins are always assigned to
+ * respective I2C buses and require no configuration.
+ */
+#ifdef AST_SOC_G5
+ } else if (bus_num == 1) {
+ setbits_le32(AST_SCU_BASE + AST_SCU_FUN_PIN_CTRL8,
+ SCU_FUN_PIN_SDA1 | SCU_FUN_PIN_SCL1);
+ } else if (bus_num == 2) {
+ setbits_le32(AST_SCU_BASE + AST_SCU_FUN_PIN_CTRL8,
+ SCU_FUN_PIN_SDA2 | SCU_FUN_PIN_SCL2);
+#endif
+ }
+}