Message ID | 1476312288-100725-4-git-send-email-xow@google.com |
---|---|
State | Accepted, archived |
Headers | show |
On Thu, Oct 13, 2016 at 9:44 AM, Xo Wang <xow@google.com> wrote: > Enable I2C buses on Zaius that have devices attached and add bindings > for muxed I2C buses. > > Signed-off-by: Xo Wang <xow@google.com> Reviewed-by: Joel Stanley <joel@jms.id.au> > --- > arch/arm/boot/dts/aspeed-bmc-opp-zaius.dts | 22 ++++++++++++++++++---- > 1 file changed, 18 insertions(+), 4 deletions(-) > > diff --git a/arch/arm/boot/dts/aspeed-bmc-opp-zaius.dts b/arch/arm/boot/dts/aspeed-bmc-opp-zaius.dts > index cc2e84b..8c3912a 100644 > --- a/arch/arm/boot/dts/aspeed-bmc-opp-zaius.dts > +++ b/arch/arm/boot/dts/aspeed-bmc-opp-zaius.dts > @@ -102,7 +102,14 @@ > }; > > &i2c1 { > - status = "disabled"; > + status = "okay"; > + > + i2c-switch@71 { > + compatible = "nxp,pca9546"; > + reg = <0x71>; > + #address-cells = <1>; > + #size-cells = <0>; > + }; > > /* MUX1 PCA9546A @71h > * PCIe 0 > @@ -125,7 +132,14 @@ > }; > > &i2c4 { > - status = "disabled"; > + status = "okay"; > + > + i2c-switch@71 { > + compatible = "nxp,pca9546"; > + reg = <0x71>; > + #address-cells = <1>; > + #size-cells = <0>; > + }; > > /* MUX1 PCA9546A @71h > * PCIe 3 > @@ -153,7 +167,7 @@ > }; > > &i2c7 { > - status = "disabled"; > + status = "okay"; > > /* MUX PCA9541A (other master: CPU0 PCIe 1) > * ADM1272 PMBUS @10h > @@ -167,7 +181,7 @@ > }; > > &i2c8 { > - status = "disabled"; > + status = "okay"; > > /* CPU1 VR ISL68137 0.7V, 0.96V PMBUS @65h */ > /* CPU1 VR ISL68137 1.2V CH03 PMBUS @44h */ > -- > 2.8.0.rc3.226.g39d4020 > > _______________________________________________ > openbmc mailing list > openbmc@lists.ozlabs.org > https://lists.ozlabs.org/listinfo/openbmc
diff --git a/arch/arm/boot/dts/aspeed-bmc-opp-zaius.dts b/arch/arm/boot/dts/aspeed-bmc-opp-zaius.dts index cc2e84b..8c3912a 100644 --- a/arch/arm/boot/dts/aspeed-bmc-opp-zaius.dts +++ b/arch/arm/boot/dts/aspeed-bmc-opp-zaius.dts @@ -102,7 +102,14 @@ }; &i2c1 { - status = "disabled"; + status = "okay"; + + i2c-switch@71 { + compatible = "nxp,pca9546"; + reg = <0x71>; + #address-cells = <1>; + #size-cells = <0>; + }; /* MUX1 PCA9546A @71h * PCIe 0 @@ -125,7 +132,14 @@ }; &i2c4 { - status = "disabled"; + status = "okay"; + + i2c-switch@71 { + compatible = "nxp,pca9546"; + reg = <0x71>; + #address-cells = <1>; + #size-cells = <0>; + }; /* MUX1 PCA9546A @71h * PCIe 3 @@ -153,7 +167,7 @@ }; &i2c7 { - status = "disabled"; + status = "okay"; /* MUX PCA9541A (other master: CPU0 PCIe 1) * ADM1272 PMBUS @10h @@ -167,7 +181,7 @@ }; &i2c8 { - status = "disabled"; + status = "okay"; /* CPU1 VR ISL68137 0.7V, 0.96V PMBUS @65h */ /* CPU1 VR ISL68137 1.2V CH03 PMBUS @44h */
Enable I2C buses on Zaius that have devices attached and add bindings for muxed I2C buses. Signed-off-by: Xo Wang <xow@google.com> --- arch/arm/boot/dts/aspeed-bmc-opp-zaius.dts | 22 ++++++++++++++++++---- 1 file changed, 18 insertions(+), 4 deletions(-)