From patchwork Fri May 31 06:08:26 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michal Simek X-Patchwork-Id: 247850 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 53FCD2C0085 for ; Fri, 31 May 2013 16:10:04 +1000 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752048Ab3EaGJL (ORCPT ); Fri, 31 May 2013 02:09:11 -0400 Received: from mail-ea0-f180.google.com ([209.85.215.180]:52877 "EHLO mail-ea0-f180.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752422Ab3EaGIn (ORCPT ); Fri, 31 May 2013 02:08:43 -0400 Received: by mail-ea0-f180.google.com with SMTP id g10so1164887eak.39 for ; Thu, 30 May 2013 23:08:40 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:x-mailer:in-reply-to :references:in-reply-to:references:content-type:x-gm-message-state; bh=qXmLQcpgu+ayxHyVcHng9y5bN/VRkdHq8cydG9djPaA=; b=lFPKrWaXVMHIJBC0lsXoMD/+FtxS+PthUt+PCx3J1CM6d2um4ZGzi3MxCltHzzFqQ6 La8q309G/g+HnYvNaCrbL3KF6//FdtY/7WJm7PrvxXNpFwXuE8o4M8qV5jRKeubHAPTC Dcj1SXm8+lzoseCOc+PhmsTGRHEk+UEm3/Sfd4VdXTIHmRFl19o4Z2ltvzyv4TAOISi+ Be+7FIGUJJv+Qsdez9xW91jk9j9vfmM0nWh03kGK/Nco+nXZz7hLrU1MHVUYpsUYyk/W LrbtwLhizrdRmLf117LRoEHIW5zazSd9PC0rRIg9Ft/rovgCggRoucx7jSsgXgO15uf8 337g== X-Received: by 10.14.221.3 with SMTP id q3mr1328651eep.149.1369980520670; Thu, 30 May 2013 23:08:40 -0700 (PDT) Received: from localhost (nat-63.starnet.cz. [178.255.168.63]) by mx.google.com with ESMTPSA id z52sm64658381eea.1.2013.05.30.23.08.39 for (version=TLSv1.1 cipher=RC4-SHA bits=128/128); Thu, 30 May 2013 23:08:40 -0700 (PDT) From: Michal Simek To: linux-kernel@vger.kernel.org Cc: Michal Simek , Michal Simek , "David S. Miller" , Lars-Peter Clausen , Christian Hohnstaedt , Rick Hoover , Anirudha Sarangi , Steven Wang , netdev@vger.kernel.org Subject: [PATCH v2 4/5] phy: Add Marvell 88E1116R phy ID Date: Fri, 31 May 2013 08:08:26 +0200 Message-Id: X-Mailer: git-send-email 1.8.2.3 In-Reply-To: References: In-Reply-To: References: X-Gm-Message-State: ALoCoQlS22MJ3gj7OKdWLcV6VSPPgijhjS83VoUyJ1a7ObdnDJgzxqlA9BSDzik/9IWaIT6kXjll Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org This phy is on Xilinx ZC702 zynq development board. Signed-off-by: Anirudha Sarangi Signed-off-by: Michal Simek --- Changes in v2: None drivers/net/phy/marvell.c | 65 +++++++++++++++++++++++++++++++++++++++++++++ include/linux/marvell_phy.h | 1 + 2 files changed, 66 insertions(+) -- 1.8.2.3 diff --git a/drivers/net/phy/marvell.c b/drivers/net/phy/marvell.c index 371353c..df5a9f6 100644 --- a/drivers/net/phy/marvell.c +++ b/drivers/net/phy/marvell.c @@ -116,6 +116,8 @@ #define MII_M1011_PHY_STATUS_RESOLVED 0x0800 #define MII_M1011_PHY_STATUS_LINK 0x0400 +#define MII_M1116R_CONTROL_REG_MAC 21 + MODULE_DESCRIPTION("Marvell PHY driver"); MODULE_AUTHOR("Andy Fleming"); @@ -372,6 +374,55 @@ static int m88e1318_config_aneg(struct phy_device *phydev) return m88e1121_config_aneg(phydev); } +static int m88e1116r_config_init(struct phy_device *phydev) +{ + int temp; + int err; + + temp = phy_read(phydev, MII_BMCR); + temp |= BMCR_RESET; + err = phy_write(phydev, MII_BMCR, temp); + if (err < 0) + return err; + + mdelay(500); + + err = phy_write(phydev, MII_MARVELL_PHY_PAGE, 0); + if (err < 0) + return err; + + temp = phy_read(phydev, MII_M1011_PHY_SCR); + temp |= (7 << 12); /* max number of gigabit attempts */ + temp |= (1 << 11); /* enable downshift */ + temp |= MII_M1011_PHY_SCR_AUTO_CROSS; + err = phy_write(phydev, MII_M1011_PHY_SCR, temp); + if (err < 0) + return err; + + err = phy_write(phydev, MII_MARVELL_PHY_PAGE, 2); + if (err < 0) + return err; + temp = phy_read(phydev, MII_M1116R_CONTROL_REG_MAC); + temp |= (1 << 5); + temp |= (1 << 4); + err = phy_write(phydev, MII_M1116R_CONTROL_REG_MAC, temp); + if (err < 0) + return err; + err = phy_write(phydev, MII_MARVELL_PHY_PAGE, 0); + if (err < 0) + return err; + + temp = phy_read(phydev, MII_BMCR); + temp |= BMCR_RESET; + err = phy_write(phydev, MII_BMCR, temp); + if (err < 0) + return err; + + mdelay(500); + + return 0; +} + static int m88e1111_config_init(struct phy_device *phydev) { int err; @@ -940,6 +991,19 @@ static struct phy_driver marvell_drivers[] = { .config_intr = &marvell_config_intr, .driver = { .owner = THIS_MODULE }, }, + { + .phy_id = MARVELL_PHY_ID_88E1116R, + .phy_id_mask = MARVELL_PHY_ID_MASK, + .name = "Marvell 88E1116R", + .features = PHY_GBIT_FEATURES, + .flags = PHY_HAS_INTERRUPT, + .config_init = &m88e1116r_config_init, + .config_aneg = &genphy_config_aneg, + .read_status = &genphy_read_status, + .ack_interrupt = &marvell_ack_interrupt, + .config_intr = &marvell_config_intr, + .driver = { .owner = THIS_MODULE }, + }, }; static int __init marvell_init(void) @@ -967,6 +1031,7 @@ static struct mdio_device_id __maybe_unused marvell_tbl[] = { { MARVELL_PHY_ID_88E1149R, MARVELL_PHY_ID_MASK }, { MARVELL_PHY_ID_88E1240, MARVELL_PHY_ID_MASK }, { MARVELL_PHY_ID_88E1318S, MARVELL_PHY_ID_MASK }, + { MARVELL_PHY_ID_88E1116R, MARVELL_PHY_ID_MASK }, { } }; diff --git a/include/linux/marvell_phy.h b/include/linux/marvell_phy.h index dd3c34e..ec41025 100644 --- a/include/linux/marvell_phy.h +++ b/include/linux/marvell_phy.h @@ -14,6 +14,7 @@ #define MARVELL_PHY_ID_88E1149R 0x01410e50 #define MARVELL_PHY_ID_88E1240 0x01410e30 #define MARVELL_PHY_ID_88E1318S 0x01410e90 +#define MARVELL_PHY_ID_88E1116R 0x01410e40 /* struct phy_device dev_flags definitions */ #define MARVELL_PHY_M1145_FLAGS_RESISTANCE 0x00000001