diff mbox series

[net-next,v2,1/2] mlxsw: core: Add ethtool support for QSFP-DD transceivers

Message ID 20200728102016.1960193-2-idosch@idosch.org
State Accepted
Delegated to: David Miller
Headers show
Series mlxsw: Add support for QSFP-DD transceiver type | expand

Commit Message

Ido Schimmel July 28, 2020, 10:20 a.m. UTC
From: Vadim Pasternak <vadimp@mellanox.com>

The Quad Small Form Factor Pluggable Double Density (QSFP-DD) hardware
specification defines a form factor that supports up to 400 Gbps in
aggregate over an 8x50-Gbps electrical interface. The QSFP-DD supports
both optical and copper interfaces.

Implementation is based on Common Management Interface Specification;
Rev 4.0 May 8, 2019. Table 8-2 "Identifier and Status Summary (Lower
Page)" from this spec defines "Id and Status" fields located at offsets
00h - 02h. Bit 2 at offset 02h ("Flat_mem") specifies QSFP EEPROM memory
mode, which could be "upper memory flat" or "paged". Flat memory mode is
coded "1", and indicates that only page 00h is implemented in EEPROM.
Paged memory is coded "0" and indicates that pages 00h, 01h, 02h, 10h
and 11h are implemented. Pages 10h and 11h are currently not supported
by the driver.

"Flat" memory mode is used for the passive copper transceivers. For this
type only page 00h (256 bytes) is available. "Paged" memory is used for
the optical transceivers. For this type pages 00h (256 bytes), 01h (128
bytes) and 02h (128 bytes) are available. Upper page 01h contains static
advertising field, while upper page 02h contains the module-defined
thresholds and lane-specific monitors.

Extend enumerator 'mlxsw_reg_mcia_eeprom_module_info_id' with additional
field 'MLXSW_REG_MCIA_EEPROM_MODULE_INFO_TYPE_ID'. This field is used to
indicate for QSFP-DD transceiver type which memory mode is to be used.

Expose 256 bytes buffer for QSFP-DD passive copper transceiver and
512 bytes buffer for optical.

Signed-off-by: Vadim Pasternak <vadimp@mellanox.com>
Signed-off-by: Ido Schimmel <idosch@mellanox.com>
---
 .../net/ethernet/mellanox/mlxsw/core_env.c    | 21 +++++++++++++++++--
 drivers/net/ethernet/mellanox/mlxsw/reg.h     |  2 ++
 2 files changed, 21 insertions(+), 2 deletions(-)

Comments

Andrew Lunn July 28, 2020, 2:04 p.m. UTC | #1
On Tue, Jul 28, 2020 at 01:20:15PM +0300, Ido Schimmel wrote:
> From: Vadim Pasternak <vadimp@mellanox.com>
> 
> The Quad Small Form Factor Pluggable Double Density (QSFP-DD) hardware
> specification defines a form factor that supports up to 400 Gbps in
> aggregate over an 8x50-Gbps electrical interface. The QSFP-DD supports
> both optical and copper interfaces.
> 
> Implementation is based on Common Management Interface Specification;
> Rev 4.0 May 8, 2019. Table 8-2 "Identifier and Status Summary (Lower
> Page)" from this spec defines "Id and Status" fields located at offsets
> 00h - 02h. Bit 2 at offset 02h ("Flat_mem") specifies QSFP EEPROM memory
> mode, which could be "upper memory flat" or "paged". Flat memory mode is
> coded "1", and indicates that only page 00h is implemented in EEPROM.
> Paged memory is coded "0" and indicates that pages 00h, 01h, 02h, 10h
> and 11h are implemented. Pages 10h and 11h are currently not supported
> by the driver.
> 
> "Flat" memory mode is used for the passive copper transceivers. For this
> type only page 00h (256 bytes) is available. "Paged" memory is used for
> the optical transceivers. For this type pages 00h (256 bytes), 01h (128
> bytes) and 02h (128 bytes) are available. Upper page 01h contains static
> advertising field, while upper page 02h contains the module-defined
> thresholds and lane-specific monitors.
> 
> Extend enumerator 'mlxsw_reg_mcia_eeprom_module_info_id' with additional
> field 'MLXSW_REG_MCIA_EEPROM_MODULE_INFO_TYPE_ID'. This field is used to
> indicate for QSFP-DD transceiver type which memory mode is to be used.
> 
> Expose 256 bytes buffer for QSFP-DD passive copper transceiver and
> 512 bytes buffer for optical.
> 
> Signed-off-by: Vadim Pasternak <vadimp@mellanox.com>
> Signed-off-by: Ido Schimmel <idosch@mellanox.com>

Reviewed-by: Andrew Lunn <andrew@lunn.ch>

    Andrew
diff mbox series

Patch

diff --git a/drivers/net/ethernet/mellanox/mlxsw/core_env.c b/drivers/net/ethernet/mellanox/mlxsw/core_env.c
index a7d86df7123f..1828dc569524 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/core_env.c
+++ b/drivers/net/ethernet/mellanox/mlxsw/core_env.c
@@ -70,8 +70,9 @@  mlxsw_env_query_module_eeprom(struct mlxsw_core *mlxsw_core, int module,
 		if (qsfp) {
 			/* When reading upper pages 1, 2 and 3 the offset
 			 * starts at 128. Please refer to "QSFP+ Memory Map"
-			 * figure in SFF-8436 specification for graphical
-			 * depiction.
+			 * figure in SFF-8436 specification and to "CMIS Module
+			 * Memory Map" figure in CMIS specification for
+			 * graphical depiction.
 			 */
 			page = MLXSW_REG_MCIA_PAGE_GET(offset);
 			offset -= MLXSW_REG_MCIA_EEPROM_UP_PAGE_LENGTH * page;
@@ -221,6 +222,22 @@  int mlxsw_env_get_module_info(struct mlxsw_core *mlxsw_core, int module,
 		else
 			modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN / 2;
 		break;
+	case MLXSW_REG_MCIA_EEPROM_MODULE_INFO_ID_QSFP_DD:
+		/* Use SFF_8636 as base type. ethtool should recognize specific
+		 * type through the identifier value.
+		 */
+		modinfo->type       = ETH_MODULE_SFF_8636;
+		/* Verify if module EEPROM is a flat memory. In case of flat
+		 * memory only page 00h (0-255 bytes) can be read. Otherwise
+		 * upper pages 01h and 02h can also be read. Upper pages 10h
+		 * and 11h are currently not supported by the driver.
+		 */
+		if (module_info[MLXSW_REG_MCIA_EEPROM_MODULE_INFO_TYPE_ID] &
+		    MLXSW_REG_MCIA_EEPROM_CMIS_FLAT_MEMORY)
+			modinfo->eeprom_len = ETH_MODULE_SFF_8636_LEN;
+		else
+			modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN;
+		break;
 	default:
 		return -EINVAL;
 	}
diff --git a/drivers/net/ethernet/mellanox/mlxsw/reg.h b/drivers/net/ethernet/mellanox/mlxsw/reg.h
index 3c5b25495751..0638dfb23b7e 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/reg.h
+++ b/drivers/net/ethernet/mellanox/mlxsw/reg.h
@@ -8607,6 +8607,7 @@  MLXSW_ITEM32(reg, mcia, size, 0x08, 0, 16);
 #define MLXSW_REG_MCIA_TH_PAGE_NUM		3
 #define MLXSW_REG_MCIA_PAGE0_LO			0
 #define MLXSW_REG_MCIA_TH_PAGE_OFF		0x80
+#define MLXSW_REG_MCIA_EEPROM_CMIS_FLAT_MEMORY	BIT(7)
 
 enum mlxsw_reg_mcia_eeprom_module_info_rev_id {
 	MLXSW_REG_MCIA_EEPROM_MODULE_INFO_REV_ID_UNSPC	= 0x00,
@@ -8625,6 +8626,7 @@  enum mlxsw_reg_mcia_eeprom_module_info_id {
 enum mlxsw_reg_mcia_eeprom_module_info {
 	MLXSW_REG_MCIA_EEPROM_MODULE_INFO_ID,
 	MLXSW_REG_MCIA_EEPROM_MODULE_INFO_REV_ID,
+	MLXSW_REG_MCIA_EEPROM_MODULE_INFO_TYPE_ID,
 	MLXSW_REG_MCIA_EEPROM_MODULE_INFO_SIZE,
 };