From patchwork Mon Jul 27 17:13:32 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tony Nguyen X-Patchwork-Id: 1337093 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming-netdev@ozlabs.org Delivered-To: patchwork-incoming-netdev@ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=netdev-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=intel.com Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by ozlabs.org (Postfix) with ESMTP id 4BFmcF2gNZz9sRW for ; Tue, 28 Jul 2020 03:13:49 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730335AbgG0RNs (ORCPT ); Mon, 27 Jul 2020 13:13:48 -0400 Received: from mga12.intel.com ([192.55.52.136]:43935 "EHLO mga12.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729988AbgG0RNq (ORCPT ); Mon, 27 Jul 2020 13:13:46 -0400 IronPort-SDR: n0aHjxZ6sPPpwJj9t5+HB9epBq/EyHdcui6XHlSAJTSmR41gS/MzbUg2Ykc9euB1WHl95VjU4n flXYW5qwz7vQ== X-IronPort-AV: E=McAfee;i="6000,8403,9695"; a="130631835" X-IronPort-AV: E=Sophos;i="5.75,402,1589266800"; d="scan'208";a="130631835" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 27 Jul 2020 10:13:44 -0700 IronPort-SDR: dKuYrSWetSW52lkK3+lNLPLLTRwianHbGLF9QJxmZPsa4IRrwhAaKXcxnH9cUFS9lN1GgHKd/s tJGmWq9JTYAw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.75,402,1589266800"; d="scan'208";a="394048644" Received: from jtkirshe-desk1.jf.intel.com ([134.134.177.86]) by fmsmga001.fm.intel.com with ESMTP; 27 Jul 2020 10:13:44 -0700 From: Tony Nguyen To: davem@davemloft.net Cc: Sasha Neftin , netdev@vger.kernel.org, nhorman@redhat.com, sassmann@redhat.com, jeffrey.t.kirsher@intel.com, anthony.l.nguyen@intel.com, Aaron Brown Subject: [net-next v2 2/8] igc: Add Receive Descriptor Minimum Threshold Count to clear HW counters Date: Mon, 27 Jul 2020 10:13:32 -0700 Message-Id: <20200727171338.3698640-3-anthony.l.nguyen@intel.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200727171338.3698640-1-anthony.l.nguyen@intel.com> References: <20200727171338.3698640-1-anthony.l.nguyen@intel.com> MIME-Version: 1.0 Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org From: Sasha Neftin The statistics of this register are being tracked, however, the register was inadvertently missed when implementing igc_clear_hw_cntrs_base(). The register is clear on read, so add it to the function so that the register is cleared when requested so the tracked count is accurate. Signed-off-by: Sasha Neftin Tested-by: Aaron Brown Signed-off-by: Tony Nguyen --- drivers/net/ethernet/intel/igc/igc_mac.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/net/ethernet/intel/igc/igc_mac.c b/drivers/net/ethernet/intel/igc/igc_mac.c index 2d9ca3e1bdde..3a618e69514e 100644 --- a/drivers/net/ethernet/intel/igc/igc_mac.c +++ b/drivers/net/ethernet/intel/igc/igc_mac.c @@ -308,6 +308,7 @@ void igc_clear_hw_cntrs_base(struct igc_hw *hw) rd32(IGC_TLPIC); rd32(IGC_RLPIC); rd32(IGC_HGPTC); + rd32(IGC_RXDMTC); rd32(IGC_HGORCL); rd32(IGC_HGORCH); rd32(IGC_HGOTCL);