From patchwork Mon Jul 6 22:02:53 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Walle X-Patchwork-Id: 1323979 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming-netdev@ozlabs.org Delivered-To: patchwork-incoming-netdev@ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=netdev-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=walle.cc Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; secure) header.d=walle.cc header.i=@walle.cc header.a=rsa-sha256 header.s=mail2016061301 header.b=WJAW+RfT; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by ozlabs.org (Postfix) with ESMTP id 4B101y3xYYz9sRR for ; Tue, 7 Jul 2020 08:03:18 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726903AbgGFWDK (ORCPT ); Mon, 6 Jul 2020 18:03:10 -0400 Received: from ssl.serverraum.org ([176.9.125.105]:47137 "EHLO ssl.serverraum.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725892AbgGFWDK (ORCPT ); Mon, 6 Jul 2020 18:03:10 -0400 Received: from apollo.fritz.box (unknown [IPv6:2a02:810c:c200:2e91:6257:18ff:fec4:ca34]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by ssl.serverraum.org (Postfix) with ESMTPSA id E2C1523E3F; Tue, 7 Jul 2020 00:03:06 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=walle.cc; s=mail2016061301; t=1594072987; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=xxiLl0DWNXB7+pCyjr6iFH2h/cv5sg+9o/DyfCS6xH0=; b=WJAW+RfT6vialRv70N3/FBanKF9d/ooL5pkpaSznbfObWmeH3DfpgvcsjAWespjz1NBtH8 8V/R4Q6fq5YJdj/Hk+a0i0+FhBMlNL3bKSUP5xLksdwL/Tre3103B7+lkPC+nSVUhTzkjH cqRJOUf3ShhkLbKP37QgHgaznTkeIIE= From: Michael Walle To: netdev@vger.kernel.org, linux-kernel@vger.kernel.org Cc: "David S . Miller" , Jakub Kicinski , Andrew Lunn , Michael Walle , Vladimir Oltean , Alex Marginean , Claudiu Manoil , Heiko Thiery , Russell King - ARM Linux admin Subject: [PATCH net-next v4 1/3] net: dsa: felix: move USXGMII defines to common place Date: Tue, 7 Jul 2020 00:02:53 +0200 Message-Id: <20200706220255.14738-2-michael@walle.cc> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200706220255.14738-1-michael@walle.cc> References: <20200706220255.14738-1-michael@walle.cc> MIME-Version: 1.0 X-Spam: Yes Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org The ENETC has the same PCS PHY and thus needs the same definitions. Move them into the common enetc_mdio.h header which has already the macros for the SGMII PCS. Signed-off-by: Michael Walle Reviewed-by: Claudiu Manoil --- drivers/net/dsa/ocelot/felix_vsc9959.c | 21 --------------------- include/linux/fsl/enetc_mdio.h | 19 +++++++++++++++++++ 2 files changed, 19 insertions(+), 21 deletions(-) diff --git a/drivers/net/dsa/ocelot/felix_vsc9959.c b/drivers/net/dsa/ocelot/felix_vsc9959.c index 19614537b1ba..53453c7015f6 100644 --- a/drivers/net/dsa/ocelot/felix_vsc9959.c +++ b/drivers/net/dsa/ocelot/felix_vsc9959.c @@ -16,29 +16,8 @@ #define VSC9959_VCAP_IS2_CNT 1024 #define VSC9959_VCAP_IS2_ENTRY_WIDTH 376 #define VSC9959_VCAP_PORT_CNT 6 - -/* TODO: should find a better place for these */ -#define USXGMII_BMCR_RESET BIT(15) -#define USXGMII_BMCR_AN_EN BIT(12) -#define USXGMII_BMCR_RST_AN BIT(9) -#define USXGMII_BMSR_LNKS(status) (((status) & GENMASK(2, 2)) >> 2) -#define USXGMII_BMSR_AN_CMPL(status) (((status) & GENMASK(5, 5)) >> 5) -#define USXGMII_ADVERTISE_LNKS(x) (((x) << 15) & BIT(15)) -#define USXGMII_ADVERTISE_FDX BIT(12) -#define USXGMII_ADVERTISE_SPEED(x) (((x) << 9) & GENMASK(11, 9)) -#define USXGMII_LPA_LNKS(lpa) ((lpa) >> 15) -#define USXGMII_LPA_DUPLEX(lpa) (((lpa) & GENMASK(12, 12)) >> 12) -#define USXGMII_LPA_SPEED(lpa) (((lpa) & GENMASK(11, 9)) >> 9) - #define VSC9959_TAS_GCL_ENTRY_MAX 63 -enum usxgmii_speed { - USXGMII_SPEED_10 = 0, - USXGMII_SPEED_100 = 1, - USXGMII_SPEED_1000 = 2, - USXGMII_SPEED_2500 = 4, -}; - static const u32 vsc9959_ana_regmap[] = { REG(ANA_ADVLEARN, 0x0089a0), REG(ANA_VLANMASK, 0x0089a4), diff --git a/include/linux/fsl/enetc_mdio.h b/include/linux/fsl/enetc_mdio.h index 2d9203314865..611a7b0d5f10 100644 --- a/include/linux/fsl/enetc_mdio.h +++ b/include/linux/fsl/enetc_mdio.h @@ -28,6 +28,25 @@ enum enetc_pcs_speed { ENETC_PCS_SPEED_2500 = 2, }; +#define USXGMII_BMCR_RESET BIT(15) +#define USXGMII_BMCR_AN_EN BIT(12) +#define USXGMII_BMCR_RST_AN BIT(9) +#define USXGMII_BMSR_LNKS(status) (((status) & GENMASK(2, 2)) >> 2) +#define USXGMII_BMSR_AN_CMPL(status) (((status) & GENMASK(5, 5)) >> 5) +#define USXGMII_ADVERTISE_LNKS(x) (((x) << 15) & BIT(15)) +#define USXGMII_ADVERTISE_FDX BIT(12) +#define USXGMII_ADVERTISE_SPEED(x) (((x) << 9) & GENMASK(11, 9)) +#define USXGMII_LPA_LNKS(lpa) ((lpa) >> 15) +#define USXGMII_LPA_DUPLEX(lpa) (((lpa) & GENMASK(12, 12)) >> 12) +#define USXGMII_LPA_SPEED(lpa) (((lpa) & GENMASK(11, 9)) >> 9) + +enum usxgmii_speed { + USXGMII_SPEED_10 = 0, + USXGMII_SPEED_100 = 1, + USXGMII_SPEED_1000 = 2, + USXGMII_SPEED_2500 = 4, +}; + struct enetc_hw; struct enetc_mdio_priv {